A Low-cost 4 Bit, 10 Giga-samples-per-second Analog-to-digital Converter Printed Circuit Board Assembly for FPGA-based Backends

Abstract

In this study, a 4 bit, 10 giga-samples-per-second analog-to-digital converter (ADC) printed circuit board assembly (PCBA) was designed, manufactured, and characterized for digitizing radio telescopes. For this purpose, an Adsantec ANST7120A-KMA flash ADC chip was used. Together with the field-programmable gate array platform, developed by the Collaboration for Astronomy Signal Processing and Electronics Research community, the PCBA enables data acquisition with a wide bandwidth and simplifies the intermediate frequency section. In the current version, the PCBA and the chip exhibit an analog bandwidth of 10 GHz (3 dB loss) and 20 GHz, respectively, which facilitates second, third, and even fourth Nyquist sampling. The following average performance parameters were obtained from the first and second Nyquist zones of the three boards: a spurious-free dynamic range of 31.35/30.45 dB, a signal-to-noise and distortion ratio of 22.95/21.83 dB, and an effective number of bits of 3.65/3.43, respectively.

A 3 Giga Sample Per Second 14-bit Digital Receiver with 9 GHz Input Bandwidth for Solar Radio Observation

“…In some digital receivers with high-speed sampling, the sampling rate is as high as 10 Gsps, but the sampling accuracy is low that the resolution of the ADC sampling rate is only 4 bits. So, it cannot satisfy the precise observation of solar radio bursts (Jiang et al 2016).…”

Observational demonstration of a low-cost fast Fourier transform spectrometer with a delay-line-based ramp-compare ADC implemented on FPGA

“…The AC240 fabricated by Acquiris was the first digital spectrometer with a bandwidth of 1 GHz to be commercially developed for applications in radio astronomy (Benz et al 2005). During the following decade, several spectrometers with bandwidths of several GHz are developed (Klein et al 2006;Klein et al 2012;Kamazaki et al 2012;Stachnik et al 2013;Jiang et al 2014;Jiang et al 2016;Hickish et al 2016;Iwai et al 2017;Jiang et al 2020), all of which possessed a discrete analog-to-digital converter (ADC) for the sampler and a field programmable gate array (FPGA) for the calculator. Even with a narrow back-end bandwidth, the total bandwidth of the back-end system can be increased using multiple back-ends connected by an adequate IF circuit.…”