“…The data structure that represents assignment of control pins to electrodes in the array is an internal data structure that is "owned" by the architecture. The literature on pin-constrained DMFB design is vast, and includes: (1) pre-computed pin mappings that require specialized scheduling, placement, and routing algorithms [20,25,46]; (2) "pre-synthesis" array partitioning methods that update the pin-map during scheduling, placement, and routing [9,33,40,41,56,[84][85][86]; and (3) "post-synthesis" pin assignment algorithms that derive a pin-map (and, in some cases, a wire routing solution) starting with a fully-compiled assay [34,36,37,76,79,80,86]. Rather than extending the framework to include every possible ordering of tasks vis-à-vis pin assignment algorithms, we set up an initial direct addressing pinmap before scheduling.…”