A low-noise amplifier for switched capacitor filters

Jolly, R.D.; McCharles, R.H.

doi:10.1109/jssc.1982.1051879

Cited by 34 publications

(10 citation statements)

References 3 publications

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“…To decrease 1/f noise, the amplifier adopts PMOS input differential stages, as the 1/f noise of PMOS is lower than NMOS and the gate length of the load transistor should be larger than that of the input transistor [17]. Another design guideline is to maximize the gain of the first stage [18]. The amplifier in Figure 9 can achieve low noise by optimizing the parameters of the transistors.…”

Section: Ct Bandpass σδ Modulator Architecturementioning

confidence: 99%

An Auto-Tuning Continuous-Time Bandpass Sigma-Delta Modulator with Signal Observation for MEMS Gyroscope Readout Systems

Zou

et al. 2020

Sensors

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This paper presents the design and implementation of an auto-tuning continuous-time bandpass sigma-delta (ΣΔ) modulator for micro-electromechchanical systems (MEMS) gyroscope readout systems. Its notch frequency can well match the input signal frequency by adding a signal observation to the traditional ΣΔ modulator. The filter of the observation adopts the same architecture as that of the traditional ΣΔ modulator, allowing the two filters to have the same response to input signal change, which is converted into a control voltage on metal-oxide semiconductor (MOS) resistance in the filters. The automatic tuning not only works to solve the mismatch problem caused by process error and temperature variation, but can also be applied to the interface circuit of gyroscopes with different resonant frequencies. The circuit is implemented in a 0.18-μm complementary metal-oxide semiconductor (CMOS) process with a core area of 2.4 mm2. The improved modulator achieves a dynamic range of 106 dB, a noise floor below 120 dB and a maximum signal-to-noise and distortion ratio (SNDR) of 86.4 dB. The tuning capability of the chip is relatively stable under input signals from 6 to 15 kHz at temperatures ranging from −45 to 60 °C.

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Section: Ct Bandpass σδ Modulator Architecturementioning

confidence: 99%

An Auto-Tuning Continuous-Time Bandpass Sigma-Delta Modulator with Signal Observation for MEMS Gyroscope Readout Systems

Zou

et al. 2020

Sensors

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“…A fully differential two-stage low-noise operational amplifier with cascode compensation [19] was used to implement the opamp (Fig. 3).…”

Section: A Low-noise Amplifiermentioning

confidence: 99%

An ECG Recording Front-End With Continuous-Time Level-Crossing Sampling

Mansano

Yuan³

et al. 2014

IEEE Trans. Biomed. Circuits Syst.

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An ECG recording front-end with a continuous- time asynchronous level-crossing analog-to-digital converter (LC-ADC) is proposed. The system is a voltage and current mixed-mode system, which comprises a low noise amplifier (LNA), a programmable voltage-to-current converter (PVCC) as a programmable gain amplifier (PGA) and an LC-ADC with calibration DACs and an RC oscillator. The LNA shows an input referred noise of 3.77 μVrms over 0.06 Hz-950 Hz bandwidth. The total harmonic distortion (THD) of the LNA is 0.15% for a 10 mVPP input. The ECG front-end consumes 8.49 μW from a 1 V supply and achieves an ENOB up to 8 bits. The core area of the proposed front-end is 690 ×710 μm2, fabricated in a 0.18 μm CMOS technology.

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“…In particular the output pole, which can be low due to the large load capacitance, is moved up to a frequency approximately equal to (1) Stability can easily be obtained insuring that If a very large load capacitor is present, the above condition may be difficult to achieve. In this case a modified Miller compensation scheme as shown in Fig.18 can be used [8,18,19]. In the circuit a common gate MOS transistor is placed between one terminal of the Miller capacitor and the high impedance node at the output of the first stage.…”

Section: Push-pull Frequency Responsementioning

confidence: 99%

“…Furthermore a follower circuit is placed between the first and the second stage of the amplifier. [8,18,19].…”

Section: Push-pull Frequency Responsementioning

confidence: 99%

CMOS Buffer Amplifiers

Castello

1993

Analog Circuit Design

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This paper gives a tutorial presentation on the design of buffer amplifiers in CMOS technology. These are circuits that must drive a load made up of either a large capacitor or a small resistor or both. The core of the paper deals with special purpose buffer amplifiers intended for a specific application most often within a mixed analOg/digital system integrated on a single chip. Several architectures for both input class NB and output push-pull stages are discussed and compared. Issues like quiescent current control, frequency compensation, open loop and closed loop linearity are analysed in detail with the help of many examples.

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A low-noise amplifier for switched capacitor filters

Cited by 34 publications

References 3 publications

An Auto-Tuning Continuous-Time Bandpass Sigma-Delta Modulator with Signal Observation for MEMS Gyroscope Readout Systems

An Auto-Tuning Continuous-Time Bandpass Sigma-Delta Modulator with Signal Observation for MEMS Gyroscope Readout Systems

An ECG Recording Front-End With Continuous-Time Level-Crossing Sampling

CMOS Buffer Amplifiers

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