A Low-Noise High-Dynamic-Range 17-b 1.3-Megapixel 30-fps CMOS Image Sensor With Column-Parallel Two-Stage Folding-Integration/Cyclic ADC

Seo, Min-Woong; Sawamoto, Takehide; Akahori, Tomoyuki; Liu, Zheng; Iida, Takuya; Takasawa, Taishi; Kosugi, Tadayoshi; Watanabe, Takashi; Isobe, Keigo; Kawahito, Shoji

doi:10.1109/ted.2012.2215871

Cited by 48 publications

(23 citation statements)

References 11 publications

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“…The detected pixel signals are read out by a columnparallel analog-to-digital converter (ADC), which is capable of reducing noise effectively based on correlated multiple sampling (CMS), so-called folding-integration/cyclic ADC [8], [9]. CMS has relatively better 1/f noise reduction capability than high-gain CDS [10].…”

Section: Pixel Design and Operationmentioning

confidence: 99%

A 0.27e-rms Read Noise 220-μV/e-Conversion Gain Reset-Gate-Less CMOS Image Sensor With 0.11-μm CIS Process

Seo

Kawahito

Kagawa

et al. 2015

IEEE Electron Device Lett.

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A low temporal read noise and high conversion gain reset-gate-less CMOS image sensor (CIS) has been developed and demonstrated for the first time at photoelectron-counting-level imaging. To achieve a high pixel conversion gain without fine or special processes, the proposed pixel has two unique structures: 1) coupling capacitance between the transfer gate and floating diffusion (FD) and 2) coupling capacitance between the reset gate and FD, for removing parasitic capacitances around the FD node. As a result, a CIS with the proposed pixels is able to achieve a high pixel conversion gain of 220 µV/e − and a low read noise of 0.27e − rms using correlated multiple-sampling-based readout circuitry.Index Terms-CMOS image sensors (CISs), low read noise, high conversion gain, photon counting, photoelectron counting histogram (PCH).

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Section: Pixel Design and Operationmentioning

confidence: 99%

A 0.27e-rms Read Noise 220-μV/e-Conversion Gain Reset-Gate-Less CMOS Image Sensor With 0.11-μm CIS Process

Seo

Kawahito

Kagawa

et al. 2015

IEEE Electron Device Lett.

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“…있다 [3][4][5][6]. 또한, 이미지 센서에서 동작 범위 향상은 얻을 수 있 는 정보의 양을 확장시키고, 이를 통해 많은 응용분야에 적용 하고 있다 [7][8][9][10][11].…”

Section: 서 론unclassified

Dynamic Range Extension of CMOS Image Sensor with Column Capacitor and Feedback Structure

Lee¹,

Jo²,

Bae³

et al. 2015

Journal of Sensor Science and Technology

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This paper presents a wide dynamic range complementary metal oxide semiconductor (CMOS) image sensor with column capacitor and feedback structure. The designed circuit has been fabricated by using 0.18ìm 1-poly 6-metal standard CMOS technology. This sensor has dual mode operation using combination of active pixel sensor (APS) and passive pixel sensor (PPS) structure. The proposed pixel operates in the APS mode for high-sensitivity in normal light intensity, while it operates in the PPS mode for low-sensitivity in high light intensity. The proposed PPS structure is consisted of a conventional PPS with column capacitor and feedback structure. The capacitance of column capacitor is changed by controlling the reference voltage using feedback structure. By using the proposed structure, it is possible to store more electric charge, which results in a wider dynamic range. The simulation and measurement results demonstrate wide dynamic range feature of the proposed PPS. Received : Mar. 16, 2015, Revised : Mar. 26, 2015, Apr. 01, 2015, Accepted : Apr. 06, 2015 This is an Open Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License(http://creativecommons.org/ licenses/bync/3.0) which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited.

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“…As can be seen in Fig. 1, the developed imager is based on a high performance column-parallel ADCs [10], [11]. This helps significantly to reduce the temporal random noise in a readout circuitry.…”

Section: Introductionmentioning

confidence: 99%

“…For obtaining the 13 bits resolution in the cyclic ADC, switched analog core performs 12 cycles of the cyclic A/D conversion. The operation of the FI-and cyclic ADCs for the signal level is the same as that of the reset level sampling [11]. In these circuit operations, the folded number is counted by a digital counter, and the digital code of the counter output is used for the most significant bit (MSB) side of the final digital output.…”

Section: Introductionmentioning

confidence: 99%

A low-noise high-sensitivity CMOS image sensor for scientific and industrial applications

Seo

Takasawa

Yasutomi

et al. 2014

IEEE SENSORS 2014 Proceedings

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A low-noise high-sensitivity CMOS image sensor (CIS) for scientific use is developed and evaluated. The prototype sensor contains 1024(H) × 1024(V) pixels with high performance column-parallel ADCs. The measured maximum quantum efficiency (QE) is 57 % at 660 nm and long-wavelength sensitivity is also enhanced with a large sensing area and the optimized process. In addition, dark current is 0.96 pA/cm 2 at 292 K, temporal random noise in a readout circuitry is 1.17 erms , and the conversion gain is 124 μV/e -. The implemented CMOS imager using 0.11-μm CIS technology has very high sensitivity of 87 V/lx·sec that is suitable for scientific and industrial applications such as medical imaging, bioimaging, surveillance cameras, etc.

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A Low-Noise High-Dynamic-Range 17-b 1.3-Megapixel 30-fps CMOS Image Sensor With Column-Parallel Two-Stage Folding-Integration/Cyclic ADC

Cited by 48 publications

References 11 publications

A 0.27e-rms Read Noise 220-μV/e-Conversion Gain Reset-Gate-Less CMOS Image Sensor With 0.11-μm CIS Process

A 0.27e-rms Read Noise 220-μV/e-Conversion Gain Reset-Gate-Less CMOS Image Sensor With 0.11-μm CIS Process

Dynamic Range Extension of CMOS Image Sensor with Column Capacitor and Feedback Structure

A low-noise high-sensitivity CMOS image sensor for scientific and industrial applications

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