A Low Phase Noise Ring Oscillator with Miller Capacitance Cancellation

Tong, Yucheng; Dai, Fa Foster; Noori, Hossein; Zhao, Kun

doi:10.1109/iscas.2018.8351331

Cited by 4 publications

(1 citation statement)

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“…Using Equation , the overall performance of the VCO can be characterized and can be compared with previous works that measure the PN, the DC power consumption, and the tunable frequency band range. To make an overall comparison, both AI‐VCOs and ring oscillators are employed as described in Jeong et al, Haddad et al, Saberkari and Seifollahi, and Kia and Daly, and Tong et al and Choi et al, respectively. The comparisons are given in Table .…”

Section: Experimental Results and Comparisonsmentioning

confidence: 99%

Design of a CMOS 65‐nm inductor‐less VCO for ISM applications in the VHF band

Gaoding

Bousquet

2020

Circuit Theory & Apps

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Summary This paper presents a design of a CMOS cross‐coupled voltage‐controlled oscillator (VCO) using active inductors (AIs) for wide‐band applications and can also be applied to various wireless technologies standards. The compatibility of this design to different wireless standards highlights its potential to be implemented at the core of the communication front end in the Internet of Things (IoT). The proposed AI design employs a gyrator‐C topology as the basic structure to generate an inductance. The VCO uses a cross‐coupled oscillator structure with a pair of varactors to sweep the frequency. Two extra capacitors, between the AIs and the outputs of the VCO core tank, are employed to enhance the performance of the phase noise and make the VCO work similarly to a linear transconductance (LiT) oscillator. Both the AIs and the VCO are designed in the TSMC 65‐nm CMOS technology, and the performance is analyzed using postsimulation results, as well as through measurements. The fundamental frequency spans from 140 to 463 MHz. Thus, the relative tuning range of this design is approximately 107%. The optimal phase noise of the design is around −97 dBc/Hz at 1‐MHz offset. Furthermore, it achieves an excellent figure of merit (FOM) around −163 dBc/Hz with a direct current (DC) power consumption less than 3 mW. The proposed design shows an advantage in phase noise and power consumption in comparison with previous active inductor VCO and ring VCO designs, respectively. The final layout occupies only 0.4 × 0.62 mm2 including the pads. The proposed AI‐VCO shows a compact size, linear tuning, low power consumption, and good phase noise performance.

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Section: Experimental Results and Comparisonsmentioning

confidence: 99%