A Low Power CMOS Time-to-Digital Converter Based on Duty Cycle Controllable Pulse Stretcher

Chen, Chun‐Chi; Chen, Poki; Shen, You-Sheng

doi:10.1109/esscir.2006.307594

2006 Proceedings of the 32nd European Solid-State Circuits Conference 2006

DOI: 10.1109/esscir.2006.307594

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A Low Power CMOS Time-to-Digital Converter Based on Duty Cycle Controllable Pulse Stretcher

Chun‐Chi Chen

Poki Chen

You-Sheng Shen

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2012

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A low power oscillator based TDC with in-system non-linearity correction

Voelker

Hauer

2012

2012 IEEE International Symposium on Circuits and Systems

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A time to digital converter for positron emission tomography readout circuits is presented. The converter is based on a ring oscillator and is optimized for low power consumption down to 36 W at low event rates. Non-linearities caused by the oscillator startup are corrected in the digital domain. The proposed correction scheme is able to estimate the non-linearities of the converter without additional analog circuitry. A resolution of 15.08 ENOB using a 10 MHz reference clock is achieved. The circuit is implemented in a 180 nm CMOS technology occupying only 0.0077 mm 2

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A low power oscillator based TDC with in-system non-linearity correction

Voelker

Hauer

2012

2012 IEEE International Symposium on Circuits and Systems

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A Low Power CMOS Time-to-Digital Converter Based on Duty Cycle Controllable Pulse Stretcher

Cited by 1 publication

References 7 publications

A low power oscillator based TDC with in-system non-linearity correction

A low power oscillator based TDC with in-system non-linearity correction

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