A Low-Power Delta-Sigma Capacitance-to-Digital Converter for Capacitive Sensors

Abstract

This paper proposes a low-power delta-sigma capacitance-to-digital converter (CDC) for a capacitive sensor. The input of the capacitive sensor employs a zoomed-in technique with the offset capacitor to extend the input capacitance range. The proposed CDC uses a third-order switched capacitor deltasigma modulator to provide a digital output, based on a cascade of integrators with a feed forward (CIFF) structure. The current-starved operational transconductance amplifiers (OTAs) are applied in the delta-sigma modulator's first integrator to improve the current efficiency and reduce the power consumption. An autozeroing technique is used in the OTAs to reduce their offset and noise. The circuit was implemented in a 0.18-µm CMOS technology and occupies an area of 0.496 mm 2. The measurable capacitance range of the CDC can be varied from 0 to 8 pF. In a measurement time of 0.8 ms, the delta-sigma CDC achieved a 12.7 effective number of bits while consuming 18.6-µA current from a 2-V supply voltage. INDEX TERMS Capacitive sensors, delta-sigma modulation, low power.

Low-noise delta-sigma analog front end with capacitor swapping technique for capacitive microsensors

“…Table 1. summarizes the performance of the proposed low-noise incremental delta-sigma AFE with those of previous studies [5,23,24,25]. The proposed delta-sigma AFE has wide input capacitance range.…”

A Basic Study on Capacitive Sensor for Diaper Absorption Volume Estimate

“…A microcomputer with a capacitance measuring function and BLE (CYBLE-022001-00, Cypress Semiconductor Corp.) was used. The microcomputer measures capacitance based on the Delta-Sigma method [11,12]. The capacitance measurement function of mutual-capacitance sensing was validated using ceramic capacitors.…”

A High Slew-Rate Enhancement Class-AB Operational Transconductance Amplifier (OTA) for Switched-Capacitor (SC) Applications

“…The OTA is the most important block in the SC-DSM. In particular, the OTA of the first integrator plays the most important role in modulator performance [12], [13]. Therefore, the design of the SC-DSM requires a high-performance and power-efficient OTA structure.…”

“…7, the delay occurs only at the falling edge of the clock phase. To efficiently use the clock period, the falling clock edges are delayed, when the rising clock edges are synchronized [12], [13]. Here, C s1 and C DAC are the sampling capacitors, and C I1 is an integrating capacitor.…”

“…The dotted line in the figure represents the proposed OTA and chopping. The OTA is applied to the most important first integrator in the SC-DSM [12], [13]. The high slew rate and fast settling time of the OTA are important to SC-DSM.…”