2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID) 2024
DOI: 10.1109/vlsid60093.2024.00032
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A Low Power Dual-Band Sub-Sampling Phase Locked Loop with sub-100 fs RMS Jitter and <-255-dB FOMjitter

Anshul Verma,
Bishnu Prasad Das
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