A Low-Power Dual-Band WLAN CMOS Receiver

Abstract

A dual-band, dual-conversion receiver integrated from LNA to analog baseband circuitry is presented. The lowpass filters integrate a cutoff frequency auto calibration scheme and can be automatically tuned from 6-MHz to 17-MHz with ±3% accuracy. This design is suitable for multistandard, multi-bandwidth applications, such as 802.11a/b/g and the incoming 802.11n, while the RF front-end is shared. The chip was fabricated in TSMC 0.25um CMOS process with 2.5V power supply. The noise figure is 2.8dB/3.9-dB for 2.4/5-GHz bands at the maximum gain setting, and the iIP3 of 10/-3-dBm is achieved for 2.4/5-GHz bands at the minimum gain. The receiver provides a programmable gain of 88/78-dB in 2dB steps and consumes 51/54-mA current for 2.4/5-GHz bands, respectively.

A WiMAX Receiver with Variable Bandwidth of 2.5 - 20 MHz and 93 dB Dynamic Gain Range in 0.13-μm CMOS Process

“…Fig. 6 shows the algorithm used to realize the cutoff frequency auto-calibration [8]. The maximum positive and negative quantization errors of % 3 ± is achieved with a 5-bit capacitor array [9].…”