2011
DOI: 10.3390/jlpea1010045
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A Low-Power Hardware-Friendly Binary Decision Tree Classifier for Gas Identification

Abstract: In this paper, we present a hardware friendly binary decision tree (DT) classifier for gas identification. The DT classifier is based on an axis-parallel decision tree implemented as threshold networks-one layer of threshold logic units (TLUs) followed by a programmable binary tree implemented using combinational logic circuits. The proposed DT classifier circuit removes the need for multiplication operation enabling up to 80% savings in terms of silicon area and power compared to oblique based-DT while achiev… Show more

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Cited by 29 publications
(10 citation statements)
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“…Regarding concrete applications of hardware boosted decision tree classifiers, [13,14] combine silicon and highly optimized VLSI circuits for gas identification. These works do not make it use of FPGAs since the resulting circuit must be embodied in a small sensor, and size and power consumption are the main driving factors.…”
Section: Related Workmentioning
confidence: 99%
See 1 more Smart Citation
“…Regarding concrete applications of hardware boosted decision tree classifiers, [13,14] combine silicon and highly optimized VLSI circuits for gas identification. These works do not make it use of FPGAs since the resulting circuit must be embodied in a small sensor, and size and power consumption are the main driving factors.…”
Section: Related Workmentioning
confidence: 99%
“…These works do not make it use of FPGAs since the resulting circuit must be embodied in a small sensor, and size and power consumption are the main driving factors. The architecture of the solution presented in [13] is optimized for power consumption by means of the elimination of costly computations in the decision process. The work in [14] describes a parameterizable, fault tolerant hardware implementation of trees classifiers based on a custom VLSI chip and a CPLD chip for the same application.…”
Section: Related Workmentioning
confidence: 99%
“…It is worth mentioning that a classification accuracy of 88.6% is achieved with this technique. The work presented in [20] is another example of a pure hardware implementation of an EN on FPGA. The EN uses decision tree (DT) as a classifier, linear (Axis-Parallel) and non-linear (oblique) DT are evaluated.…”
Section: Related Workmentioning
confidence: 99%
“…BDT-based classifier is selected because of its simplicity in terms of software and hardware implementation [38]. BDT is a supervised learning technique with a set of class labelled data as the input of the learning algorithm and a binary tree as its output.…”
Section: Binary Decision Treementioning
confidence: 99%