2024
DOI: 10.17485/ijst/v17i3.2474
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A Low Power Shift Register Based on Pulsed Latch

Smitha Sharath Shankar,
S Rohith

Abstract: Objectives: To solve timing and power consumption issues in digital circuit design by creating a Low-Power Shift Register Based on Pulsed Latch (LPSR-PL). Targeting IoT sensors and portable devices for low-power operation, increase energy efficiency in shift registers by using numerous non-overlapping delayed pulsed clock signals, decoder-enabled design, and gated clock circuits. Methods: The work uses a unique strategy that decreases power consumption and timing difficulties by employing numerous non-overlapp… Show more

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