A low-power SoC-based moving target detection system for amphibious spherical robots

Pan, Shaowu; Shi, Liwei; Guo, Shuxiang; Guo, Ping; He, Yanlin; Xiao, Rui

doi:10.1109/icma.2015.7237642

Cited by 13 publications

(10 citation statements)

References 23 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In 2015, a prototype moving target detection system was constructed for the robot using an SoC. 12 The Gaussian background model was used for foreground detection and a customized accelerator was designed to ensure real-time image processing. However, the framework of the prototype system was coarse and inefficient, which resulted in a high CPU workload and a slow response speed of the robotic control system.…”

Section: Amphibious Spherical Robotsmentioning

confidence: 99%

See 1 more Smart Citation

A system on chip-based real-time tracking system for amphibious spherical robots

Guo

Pan

et al. 2017

International Journal of Advanced Robotic Systems

Self Cite

View full text Add to dashboard Cite

Aiming at vision applications of our amphibious spherical robot, a real-time detection and tracking system adopting Gaussian background model and compressive tracking algorithm was designed and implemented in this article. Considering the narrow load space, the limited power resource and the specialized application scenarios of the robot, a heterogeneous computing architecture combining advanced Reduced Instruction-Set Computer (RISC) machine and field programmable gate array was proposed on the basis of Zynq-7000 system on chip.Under the architecture, main parts of the vision algorithms were implemented as software programs running on the advanced RISC machine-Linux subsystem. And customized image accelerators were deployed on the field programmable gate array subsystem to speed up the timeconsuming processes of visual algorithms. Moreover, dynamic reconfiguration was used to switch accelerators online for reducing resource consumption and improving system adaptability. The word length of accelerators was optimized with simulated annealing algorithm to make a compromise between calculation accuracy and resource consumption. Experimental results confirmed the feasibility of the proposed architecture. The single board tracking system was able to provide an image processing rate of up to 89.2 frames per second at the resolution of 320 Â 240, which could meet future demands of our robot in biological monitoring and multi-target tracking.

show abstract

Section: Amphibious Spherical Robotsmentioning

confidence: 99%

“…Step #5 Selectively update the solution vector of the searching center if rate try >rate thresh && Cost(w try )<Cost(w center )then w try w try , rate try rate try else if exp(-(Cost(w try )-Cost(w center ))/temp)>rand then w try w try , rate try rate try endif end if end while end procedure [18,10,12,8].…”

Section: Dynamic Reconfiguration Of the Plmentioning

confidence: 99%

A system on chip-based real-time tracking system for amphibious spherical robots

Guo

Pan

et al. 2017

International Journal of Advanced Robotic Systems

Self Cite

View full text Add to dashboard Cite

show abstract

“…These two have been used for the recognition systems in the computer vision, video processing, and image processing research areas [1][2][3][4][5][6]. Being similar to the human brain's operation in perception and recognition, the neural network algorithms are able to process given visual information to recognize the object that we target or to predict the next movement of the target object [7][8][9][10]. The common feature of these neural network models is that they require abundant computational resources.…”

Section: Introductionmentioning

confidence: 99%

“…FPGA has been getting attention as an extensible computational device. It has also become known as a device that consumes less power than the graphics processing unit (GPU) [7][8][9][10]12].…”

Section: Introductionmentioning

confidence: 99%

Low-Power RTL Code Generation for Advanced CNN Algorithms toward Object Detection in Autonomous Vehicles

Kim

Yadav

et al. 2020

Electronics

View full text Add to dashboard Cite

In the implementation process of a convolution neural network (CNN)-based object detection system, the primary issues are power dissipation and limited throughput. Even though we utilize ultra-low power dissipation devices, the dynamic power dissipation issue will be difficult to resolve. During the operation of the CNN algorithm, there are several factors such as the heating problem generated from the massive computational complexity, the bottleneck generated in data transformation and by the limited bandwidth, and the power dissipation generated from redundant data access. This article proposes the low-power techniques, applies them to the CNN accelerator on the FPGA and ASIC design flow, and evaluates them on the Xilinx ZCU-102 FPGA SoC hardware platform and 45 nm technology for ASIC, respectively. Our proposed low-power techniques are applied at the register-transfer-level (RT-level), targeting FPGA and ASIC. In this article, we achieve up to a 53.21% power reduction in the ASIC implementation and saved 32.72% of the dynamic power dissipation in the FPGA implementation. This shows that our RTL low-power schemes have a powerful possibility of dynamic power reduction when applied to the FPGA design flow and ASIC design flow for the implementation of the CNN-based object detection system.

show abstract

“…In the end of year 2015 over 30 SoC-based papers were available in the most popular databases. They cover different topics: -image filtering [16], -feature extraction [28,60], -optical flow computation [42], -road sign recognition [54], -driver awareness monitoring system [56], -face detection [23,77], -stereovison system [10], -object detection and tracking [49], -advanced driver assistance systems [59].…”

Section: Introductionmentioning

confidence: 99%

Real-time hardware–software embedded vision system for ITS smart camera implemented in Zynq SoC

Kryjak

Komorkiewicz

Gorgon

2016

J Real-Time Image Proc

View full text Add to dashboard Cite

The article demonstrates the usefulness of heterogeneous System on Chip (SoC) devices in smart cameras used in intelligent transportation systems (ITS). In a compact, energy efficient system the following exemplary algorithms were implemented: vehicle queue length estimation, vehicle detection, vehicle counting and speed estimation (using multiple virtual detection lines), as well as vehicle type (local binary features and SVM classifier) and colour (k-means classifier and YCbCr colourspace analysis) recognition. The solution exploits the hardwaresoftware architecture, i.e. the combination of reconfigurable resources and the efficient ARM processor. Most of the modules were implemented in hardware, using Verilog HDL, taking full advantage of the possible parallelization and pipeline, which allowed to obtain real-time image processing. The ARM processor is responsible for executing some parts of the algorithm, i.e. high-level image processing and analysis, as well as for communication with the external systems (e.g. traffic lights controllers). The demonstrated results indicate that modern SoC systems are a very interesting platform for advanced ITS systems and other advanced embedded image processing, analysis and recognition applications.Keywords Intelligent Transportation Systems Á Hardware-software image processing (Zynq SoC) Á Vehicle queue length estimation Á Vehicle detection Á Vehicle type and colour recognition

show abstract

A low-power SoC-based moving target detection system for amphibious spherical robots

Cited by 13 publications

References 23 publications

A system on chip-based real-time tracking system for amphibious spherical robots

A system on chip-based real-time tracking system for amphibious spherical robots

Low-Power RTL Code Generation for Advanced CNN Algorithms toward Object Detection in Autonomous Vehicles

Real-time hardware–software embedded vision system for ITS smart camera implemented in Zynq SoC

Contact Info

Product

Resources

About