A Low-Power Visual-Horizon Estimation Chip

Horiuchi, Timothy K.

doi:10.1109/tcsi.2008.2010097

Cited by 5 publications

(3 citation statements)

References 9 publications

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“…Horizon line sensors are used for Unmanned Aerial Vehicles (UAVs). However, in this case such sensors are mainly used not for navigation, but for angular stabilisation (Taylor et al, 2003; Ettinger et al, 2002; Shabayek et al, 2012; Cornall and Egan, 2004; Horiuchi, 2009). The precision of such sensors is poor, so they cannot be used for navigation.…”

Section: Introductionmentioning

confidence: 99%

Horizon Line Stability Observations over the Sea

Гришин

Maslov

2017

J. Navigation

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Increasing the stability and reliability of navigation for mobile objects of different classes is becoming increasingly significant. Satellite navigation systems have a fundamental defect: a vulnerability to hacking and spoofing. Observation of the horizon line is significant for two applications. The first is stellar inertial navigation systems. In this case, the horizon line can be used for local vertical estimation. Errors in local vertical estimation directly affect coordinate errors. The second is correlation-extremal navigation based on the observed horizon line shape (when islands or continents are observed from aerial vehicles). In both cases, instability of the horizon line produces navigation errors. A measurement procedure for horizon line position estimation was proposed and realised. Around-the-clock horizon line shooting was undertaken in 2013. Processing of the results shows a horizon line direction instability of about 5–7 angular minutes during the day time.

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Section: Introductionmentioning

confidence: 99%

Horizon Line Stability Observations over the Sea

Гришин

Maslov

2017

J. Navigation

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“…15) More advanced vision chip designs focus on more specific visual tasks such as fingerprint recognition, 16) eye tracking 17) and horizon detection. 18) As the required image processing functions become more complex, it becomes such an inevitable problem that the processing circuits occupy a large circuit area, which results in a small fill factor and a limited sensor resolution. Some designs try to solve this problem by replacing the massively parallel processing elements in each pixel with row-parallel processors, which turns out to achieve similar performance for various visual applications, such as the high-speed tracking and image filtering.…”

Section: Introductionmentioning

confidence: 99%

High speed vision processor with reconfigurable processing element array based on full-custom distributed memory

Chen¹,

Yang²,

Cong³

et al. 2016

Jpn. J. Appl. Phys.

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In this paper, a hybrid vision processor based on a compact full-custom distributed memory for near-sensor high-speed image processing is proposed. The proposed processor consists of a reconfigurable processing element (PE) array, a row processor (RP) array, and a dual-core microprocessor. The PE array includes two-dimensional processing elements with a compact full-custom distributed memory. It supports real-time reconfiguration between the PE array and the self-organized map (SOM) neural network. The vision processor is fabricated using a 0.18 µm CMOS technology. The circuit area of the distributed memory is reduced markedly into 1/3 of that of the conventional memory so that the circuit area of the vision processor is reduced by 44.2%. Experimental results demonstrate that the proposed design achieves correct functions.

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“…A large number of vision chips have been developed [4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23]. Among these vision chips, the programmable vision chips with digital processors usually show better performances, such as high processing speed, flexibility and robustness [14][15][16][17][18][19].…”

Section: Introductionmentioning

confidence: 99%

A high speed multi-level-parallel array processor for vision chips

Cong

Yang

et al. 2014

Sci. China Inf. Sci.

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This paper proposes a high speed multi-level-parallel array processor for programmable vision chips. This processor includes 2-D pixel-parallel processing element (PE) array and 1-D row-parallel row processor (RP) array. The two arrays both operate in a single-instruction multiple-data (SIMD) fashion and share a common instruction decoder. The sizes of the arrays are scalable according to dedicated applications. In PE array, each PE can communicate not only with its nearest neighbor PEs, but also with the next near neighbor PEs in diagonal directions. This connection can help to speed up local operations in low-level image processing. On the other hand, global operations in mid-level processing are accelerated by the skipping chain and binary boosters in RP array. The array processor was implemented on an FPGA device, and was successfully tested for various algorithms, including real-time face detection based on PPED algorithm. The results show that the image processing speed of proposed processor is much higher than that of the state-of-the-arts digital vision chips.

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A Low-Power Visual-Horizon Estimation Chip

Cited by 5 publications

References 9 publications

Horizon Line Stability Observations over the Sea

Horizon Line Stability Observations over the Sea

High speed vision processor with reconfigurable processing element array based on full-custom distributed memory

A high speed multi-level-parallel array processor for vision chips

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