A Measure of Computational Work

Hellerman, Leo

doi:10.1109/t-c.1972.223539

Cited by 63 publications

(22 citation statements)

References 9 publications

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“…The computational work W (f ) of an n-input combinatorial function f with m outputs is given by [27] W…”

Section: Complexity-based Area Estimationmentioning

confidence: 99%

“…Using equation 2.25 and 2.26, we obtain the total energy E lost during a low to high transition, given by 27) where the voltage swing V ∆ of the gate is given by…”

Section: Capacitance Chargingmentioning

confidence: 99%

“…The latencies per unit, memory and interface are given by 27) respectively, where e(v) denotes all incoming and outgoing edges of node v. The total latency is calculated using…”

Section: Latencymentioning

confidence: 99%

See 2 more Smart Citations

Power-Aware Architecting for data-dominated applications

Ditzel¹,

Otten²,

Serdijn³

2007

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“…The computational work W (f ) of an n-input combinatorial function f with m outputs is given by [27] W…”

Section: Complexity-based Area Estimationmentioning

confidence: 99%

“…Using equation 2.25 and 2.26, we obtain the total energy E lost during a low to high transition, given by 27) where the voltage swing V ∆ of the gate is given by…”

Section: Capacitance Chargingmentioning

confidence: 99%

See 1 more Smart Citation

Power-Aware Architecting for data-dominated applications

Ditzel¹,

Otten²,

Serdijn³

2007

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“…Information-theoretic measures have been employed in the past to dene a measure of computational work of a boolean transformation [10][11]. This measure of computational work is closely related to the area [12] occupied by an implementation of the boolean function.…”

Section: Introductionmentioning

confidence: 99%

Lower bounds on power-dissipation for DSP algorithms

Shanbhag¹

Proceedings of 1996 International Symposium on Low Power Electronics and Design

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Presented in this paper is a fundamental mathematical basis for determining the lower bounds on power dissipation in digital signal processing (DSP) algorithms. This basis is derived f r om information-theoretic arguments. In particular, a digital signal processing algorithm is viewed a s a p r o c ess of information transfer with an inherent information transfer rate requirement of R bits/sec. Dierent architectures implementing a given algorithm are e quivalent to dierent communication networks each with a certain capacity C (also in bits/sec). The absolute lower bound on the power dissipation for any given architecture is then obtained by minimizing the signal power such that its channel capacity C is equal to the desired information transfer rate R. The proposed framework is employed to determine the lower-bounds for simple digital lters. Furthermore, lower bounds on the power dissipation achievable via adiabatic logic is also presented thus demonstrating the versatility of the proposed approach.

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“…• other related design problems (influence of types of logical gates on entropy [2], estimation of logical work in networks and programs [3]). …”

Section: Introductionmentioning

confidence: 99%

On the information engine of circuit design

Popel

Hakeem

The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002.

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This paper addresses a new approach to find a spectrum of information measures for the process of digital circuit synthesis. We consider the problem from the information engine point of view. The circuit synthesis as a whole and different steps of the design process (an example of decision diagram is given) are presented via such measurements as entropy, logical work and information vitality. We also introduce new information measures to provide better estimates of synthesis criteria. We show that the basic properties of information engine, such as the conservation law of information flow and the equilibrium law of information can be formulated.

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A Measure of Computational Work

Cited by 63 publications

References 9 publications

Power-Aware Architecting for data-dominated applications

Power-Aware Architecting for data-dominated applications

Lower bounds on power-dissipation for DSP algorithms

On the information engine of circuit design

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