A memetic algorithm for computing 3D capacitance in multiconductor VLSI circuits

Bontzios, Yiorgos I.; Dimopoulos, Michael G.; Hatzopoulos, A.A.

doi:10.1109/ddecs.2011.5783108

Cited by 1 publication

(1 citation statement)

References 15 publications

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“…In [5], a memetic algorithm is discussed for computing the capacitance coupling in VLSI circuits. In [6], a new sampling-based yield optimization algorithm based on Memetic Ordinal Optimization is presented that improves the yield efficiency of analog circuits.…”

Section: Metamodel-assisted Ultra-fast Memetic Optimization Of a Pll mentioning

confidence: 99%

Metamodel-assisted ultra-fast memetic optimization of a PLL for WiMax and MMDS applications

Garitselov¹,

Mohanty²,

Kougianos³

et al. 2012

Thirteenth International Symposium on Quality Electronic Design (ISQED)

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With CMOS technologies progressing deeper into the nano-scale domain the design of analog and mixed-signal components is becoming very challenging. The presence of parasitics and the complexity of calculations involved create an enormous challenge for designers to keep their design within specifications when reaching the physical layout stage of the design process. This paper proposes a novel ultra-fast design flow that uses memetic-based optimization algorithms over neuralnetwork based non-polynomial metamodels for design-space exploration. A new heuristic optimization algorithm which is based on memetic algorithms and artificial bee colony optimization is introduced. The design flow relies on a multiple-layer feedforward neural network metamodel of the nano-CMOS circuit. Using a CMOS PLL circuit it is shown that the proposed design flow is flexible and robust while it achieves optimal design to two different wireless specifications, WiMax and MMDS. Experimental results show that the proposed approach is 2.4× faster than the swarm based optimization over the same metamodels.

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Section: Metamodel-assisted Ultra-fast Memetic Optimization Of a Pll mentioning

confidence: 99%

Metamodel-assisted ultra-fast memetic optimization of a PLL for WiMax and MMDS applications

Garitselov¹,

Mohanty²,

Kougianos³

et al. 2012

Thirteenth International Symposium on Quality Electronic Design (ISQED)

View full text Add to dashboard Cite

show abstract

A memetic algorithm for computing 3D capacitance in multiconductor VLSI circuits

Cited by 1 publication

References 15 publications

Metamodel-assisted ultra-fast memetic optimization of a PLL for WiMax and MMDS applications

Metamodel-assisted ultra-fast memetic optimization of a PLL for WiMax and MMDS applications

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