A Memory System for Education

Abstract

The memory system is one of the core topics in computer architecture and organization. An important problem in teaching this topic is how to help students connect their theoretical knowledge of memory system concepts with the practical problems facing the designer of various parts of a memory system. A common approach to tackling this problem is to organize practical exercises in the laboratory using a memory system simulator. The existing simulators mainly focus on subtle memory system issues, such as cache performance, latency, coherence and consistency models in multiprocessor systems and do not admit a view of design details and internal activities within various parts of a memory system. This paper presents an originally developed memory system for education and its web-based simulator. The memory system includes the virtual memory and translation lookaside buffer, the cache memory and the interleaved main memory. The simulator facilitates a web-based clock-by-clock interactive simulation of the memory system, its visual presentation at the register-transfer level and navigation through parts of the system. They can be used for exercises in the laboratory and self-learning from home.

Web memory hierarchy learning and research environment

“…The integration of the traditional teaching method with the use of didactic simulators contributes to a better understanding of the subject since they are capable of translating to reality the theoretical concepts by introducing them in a clear and didactic fashion [4]- [9].…”