2012 IEEE International Test Conference 2012
DOI: 10.1109/test.2012.6401576
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A memory yield improvement scheme combining built-in self-repair and error correction codes

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Cited by 20 publications
(10 citation statements)
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“…The scrubbing interval t s is set to occur every 6 minutes, while selftest and repair is set to occur every 10 days. The reliability of the proposed strategy is compared to the reliability of the traditional combined approach strategy [2], [5], where only uncorrectable words are repaired, while correctable words are left to the ECC.…”
Section: Reliability Evaluationmentioning
confidence: 99%
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“…The scrubbing interval t s is set to occur every 6 minutes, while selftest and repair is set to occur every 10 days. The reliability of the proposed strategy is compared to the reliability of the traditional combined approach strategy [2], [5], where only uncorrectable words are repaired, while correctable words are left to the ECC.…”
Section: Reliability Evaluationmentioning
confidence: 99%
“…To enable memory yield enhancement, repair using comprehensive redundancy scheme has been used. In order to enhance yield further, a combined approach of error correction code (ECC) and redundancy scheme is introduced [2]. Also, errors caused by hardware faults are becoming a threat to field reliability.…”
Section: Introductionmentioning
confidence: 99%
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“…Different protection capabilities can be achieved according to the estimation results of the achieved reliability levels. An ECC-Enhanced Memory Repair (EEMR) scheme for yield improvement of embedded memories is proposed in [16]. This work evaluates the back-end flow that combines both ECC and BIRA to determine whether yield can be improved by proper sequencing of the two steps.…”
Section: Introductionmentioning
confidence: 99%