1988
DOI: 10.1109/23.25521
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A method for characterizing a microprocessor's vulnerability to SEU

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Cited by 41 publications
(21 citation statements)
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“…The goal was to determine the underlying SEU cross-section of the 320C50 in order to use it to predict error rates for the modem application. During these tests 336 upsets were detected for a fluence of 19945 Chlorine ions, thus, the measured SEU cross-section was : σ SEU (12.7 Mev/mg/cm 2 ) = 1.73x 10 -2 cm 2 /device (1) Knowing that the modem application occupies about 12% of the internal memory, we can forecast that the number of upsets arising in the sensitive area will be approximatively 8 times less. Among these upsets, we know from CEU injections that only 0.93 % should provoke deviations at the modem program outputs.…”
Section: B Ceu Injection On a Modem Application Implemented On A 320mentioning
confidence: 99%
See 1 more Smart Citation
“…The goal was to determine the underlying SEU cross-section of the 320C50 in order to use it to predict error rates for the modem application. During these tests 336 upsets were detected for a fluence of 19945 Chlorine ions, thus, the measured SEU cross-section was : σ SEU (12.7 Mev/mg/cm 2 ) = 1.73x 10 -2 cm 2 /device (1) Knowing that the modem application occupies about 12% of the internal memory, we can forecast that the number of upsets arising in the sensitive area will be approximatively 8 times less. Among these upsets, we know from CEU injections that only 0.93 % should provoke deviations at the modem program outputs.…”
Section: B Ceu Injection On a Modem Application Implemented On A 320mentioning
confidence: 99%
“…An interesting approach to overcome for this difficulty was proposed in [1], where the authors stressed the importance for evaluating the applica-tion's cross-section, of calculating the "duty factors" of various processor elements used by the software. The time between loading a given register or memory location and writing it to memory is the period during which the register is sensitive to upsets.…”
Section: Introductionmentioning
confidence: 99%
“…However if the interest into using Commercial Off The Shelf (COTS) components in space application could be an interesting alternative to rad-hard components due to their low cost and high performances, in embedded computing the usage of rad-hard technologies would just be unfeasible for its uneconomical impact. Although we are focusing on the transient faults it should be noticed that in general the effects of radiations are divided in permanent and transient faults, where the permanent faults can be considered an accelerated ageing and are related to the total time that a device spends under radiation (TID: Total Ionizing Dose) while the transient faults are instantaneous and are related to the energy and charge of the impacting particles (SEU), also for this randomness of their occurrence in time SEU represent presently one of the most interesting fault types due to the radiation effects on integrated circuits [1] [2].…”
Section: Introductionmentioning
confidence: 99%
“…In a real design, a more frequently used block should be protected by TMR since its fault is more likely to affect the whole system. However, block usage needs further measurement [14] and is not part of our paper.…”
Section: Design Candidatesmentioning
confidence: 99%