A method for the calculation of the softerror rate of sub‐μm dynamic logic cmos circuits

Abstract

As a prerequisite for predicting the soft‐error rate (SER) of CMOS circuits with dynamic registers a method to calculate the SER is presented which takes into account charge collection by drift and diffusion. It has been found that besides collection due to drift, the noise charge collected by diffusion has to be considered to accurately predict the SER of dynamic CMOS circuits. Calculated results are compared to device simulations and SER measurements.