A methodology for drop performance prediction and application for design optimization of chip scale packages

Syed, Ahmer; Kim, Seung Mo; Lin, Wei; Khim, Jin Young; Song, Eun Sook; Shin, Jae Hyeon; Panczak, T.

doi:10.1109/ectc.2005.1441308

Cited by 31 publications

(22 citation statements)

References 5 publications

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“…Thus, the damage may be as significant as the contribution due to differential flexing between the PCB and IC package. Syed et al [8] also showed the joint failure in the IC packages across the PCB is location dependent. In accelerated thermal cycling tests, the temperature excursion between C and C had caused concurrent degradation of the solder joint resulting in intermetallic compound (IMC) growth [16] and thermal fatigue damage [17].…”

Section: Evaluation On Influencing Factors Of Board-levelmentioning

confidence: 95%

Evaluation on Influencing Factors of Board-Level Drop Reliability for Chip Scale Packages (Fine-Pitch Ball Grid Array)

Chong¹,

Che

Pang

et al. 2008

IEEE Trans. Adv. Packag.

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Board-level drop testing is an effective method to characterize the solder joint reliability performance of miniature handheld products. In this study, drop test of printed circuit boards (PCBs) with a four-screw support condition was conducted for a 15 mm 15 mm fine-pitch ball grid array (FBGA) package assembly with solder ball compositions of 36Pb-62Sn-2Ag and Sn-4Ag-0.5Cu on printed circuit board (PCB) surface finishes of organic solderability preservative, electroless nickel immersion gold, and immersion tin. Finite element modeling of the FBGA assembly was performed to study the stress-strain behavior of the solder joints during drop test. The drop test results revealed a strong influence of different intermetallic compound formation on soldered assemblies drop durability. The lead-based solder supersedes the lead-free composition regardless of the types of surface finish. Joints on organic solderability preservative were found to be strongest for each solder type. Other factors affecting drop reliability such as component location on the board and thermal cycling aging effects are reported. Finite element modeling results showed that a solder joint is more prone to failure on the PCB side, and the predicted solder joint stresses are location dependent. Predicted failure sites based on simulation results are consistent with experimental observations. Index Terms-Board-level drop reliability, chip scale package (CSP), fine-pitch ball grid array (FBGA) package, lead-free, printed circuit board (PCB) surface finish, thermal aging.

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Section: Evaluation On Influencing Factors Of Board-levelmentioning

confidence: 95%

Evaluation on Influencing Factors of Board-Level Drop Reliability for Chip Scale Packages (Fine-Pitch Ball Grid Array)

Chong¹,

Che

Pang

et al. 2008

IEEE Trans. Adv. Packag.

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show abstract

“…Due to the large deformation constituted by both the bending and twisting modes, the solder joints experienced the highest level of stress where all the solder joints failed below the drop cycles of twenty. Study by Syed et al [8] revealed similar observation. In their test the PCB is fully populated with fifteen components, and solder joints at location #14 (refer to Fig.…”

Section: Drop Test Results and Trendssupporting

confidence: 70%

“…Thus the damage may be as significant as the contribution due to differential flexing between the PCB and IC package. Syed et al [8] also showed the joint failure in the IC packages across the PCB is location dependent.…”

Section: Introductionmentioning

confidence: 95%

“…Research and studies have been conducted for the investigation of the reliability performance of IC packages during drop impact test [1][2][3][4][5][6]. Work on developing modeling methodologies for failure prediction of solder joints upon drop test are being investigated [7][8][9]. With the implementation of lead-free solders for the purpose of environmental friendliness, experimentation and analysis focusing on lead-free solder compositions have also been performed and documented [10][11][12][13].…”

mentioning

confidence: 99%

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Performance Assessment on Board-level Drop Reliability for Chip Scale Packages (Fine-Pitch BGA)

Chong¹,

Che²,

Xu³

et al.

56th Electronic Components and Technology Conference 2006

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Board level drop testing is an effective method to characterize the solder joint reliability performance of miniature handheld products. In this study, drop test of printed circuit boards (PCB) with four-screw support condition was conducted for a 15mmx15mm fine-pitch Ball Grid Array (FBGA) package assembly with solder ball compositions of 36Pb-62Sn-2Ag and Sn-4Ag-0.5Cu on PCB surface finishes of organic solderability preservative, electroless nickel immersion gold and immersion tin. The results revealed a strong influence of different intermetallic compound formation on soldered assemblies drop durability. The lead-based solder supersedes the lead-free composition regardless of the types of surface finish. Joints on organic solderability preservative were found to be strongest for each solder type. Other factors affecting drop reliability such as component location on the board and thermal aging effects are reported. IntroductionWith the decrease in size of consumer products such as cellular phones, PDAs, and camcorders, the frequency of accidental drops increases and will cause solder joint cracks in the board assembled Integrated Circuits (IC) packages that eventually leads to malfunction of the product. Research and studies have been conducted for the investigation of the reliability performance of IC packages during drop impact test [1][2][3][4][5][6]. Work on developing modeling methodologies for failure prediction of solder joints upon drop test are being investigated [7][8][9]. With the implementation of lead-free solders for the purpose of environmental friendliness, experimentation and analysis focusing on lead-free solder compositions have also been performed and documented [10][11][12][13]. Through finite element modeling and analysis, Wong et al [14] identified three main drivers for board level drop impact failure of interconnections; i) elongation and bending of interconnection due to differential flexing of PCB and package, ii) large inertia force from IC packages, and iii) stress waves generated from impact. There is however a lack of documentation in the use of lead-based (Pb-based) and lead-free (Pb-free) solder compositions on different printed circuit board (PCB) pad surface finishes, and their influence on drop impact reliability. The recent drop test study on a 35x35mm PBGA (plastic ball grid array) package by Chong et al [15] showed that different solder alloy of Pb-based and Pb-free when mounted onto different PCB surface finishes resulted in different intermetallics formation and contributed to different failure sites and mode of failure.

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“…Coffin-Manson) to predict failures in involved the falling mass impacting the PCB indirectly a JEDEC standard drop test [22]. The first and largest peak of through a four-point loading fixture.…”

Section: Introductionmentioning

confidence: 99%

A Comprehensive Test Method for Bridging the Gap between Product and Board Level Drop Tests

Seah

Wong

Selvanayagam³

et al. 2008

2008 10th Electronics Packaging Technology Conference

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devices, it is also very useful to be able to estimate the life of Due to rapid and continual changes in the components and solder joints under actual usage conditions designs of portable electronic devices, it is essential to have Test methods for assessing the drop impact reliability of the ability to perform quick, cost-effective and accurate solder joints are commonly performed at either the component assessments of the drop impact performance of component level or the board level. In component-level tests -typically interconnections for portable applications. In order to ball shear -loads are applied directly to the solder bumps understand the phenomena of solder joint fatigue under mounted on a package substrate. In board-level tests, loads are impact-induced PCB bending, a tester was developed applied directly to a PCB assembly, which indirectly induces specifically for applying high bending strains at high strain stresses in the solder joints between the component and the rates to a PCB assembly. Fatigue characteristics of solder PCB. joints were determined for various PCB strains, allowing the Much effort has been dedicated to developing a construction of fatigue E-N (strain vs. cycles-to-failure) component-level test method which can assess drop impact curves. Fatigue data was also generated for several bending performance. The earliest reported work on component-level frequencies in a study of the effect of strain rate on drop testing was by Shoji et. al.[6] who used a miniature pendulum impact performance. Higher bending frequencies were found tester to determine the fracture energy of solder joints under to reduce fatigue life. A comprehensive test method would high-speed shear. Since then, more sophisticated tools for also have to be capable of applying variable loading levels in high-speed ball shear have been developed, including order to replicate the complex loading spectrums seen in pendulum testing [8], drop shear [9], and motorized or springactual product drops. A variable amplitude study is presented, driven shear with force/displacement measurement [10-1 1].where crack propagation tracking shows the effect of changes High-speed ball pull studies have also been performed, to a in load levels on the crack growth rate. Finally, a study on the lesser degree [10]. The majority of component-level studies effect of low temperatures on drop impact reliability is have focused on a qualitative approach of correlating shear presented, where fatigue characteristics were obtained using failure modes (e.g. brittle or ductile fracture) with board-level the bend tester fitted with a cold temperature chamber.drop impact performance. However, quantitative measurements of shear fracture strength and fracture energy Introduction were reported to be insensitive to drop impact performance As portable electronic devices (e.g. mobile phones, MP3 [12]. Difficulties in quantitative correlations are due to 1) players) are susceptible to accidental drops in everydaybuse, an significant differences in the solder joint ...

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A methodology for drop performance prediction and application for design optimization of chip scale packages

Cited by 31 publications

References 5 publications

Evaluation on Influencing Factors of Board-Level Drop Reliability for Chip Scale Packages (Fine-Pitch Ball Grid Array)

Evaluation on Influencing Factors of Board-Level Drop Reliability for Chip Scale Packages (Fine-Pitch Ball Grid Array)

Performance Assessment on Board-level Drop Reliability for Chip Scale Packages (Fine-Pitch BGA)

A Comprehensive Test Method for Bridging the Gap between Product and Board Level Drop Tests

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