A Microprocessor-based Hypercube Supercomputer

Hayes, John P.; Mudge, Trevor; Stout, Quentin F.; Colley, S.; Palmer, J.

doi:10.1109/mm.1986.304707

Cited by 141 publications

(24 citation statements)

References 9 publications

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“…Since, obviously, it follows that (8) To maximize the number of columns under the constraint (8), we have to choose the weights of the columns as small as possible, starting with columns of weight , , etc., up to the point where the right-hand side of (8) is exceeded. Let be an integer such that (9) For the maximum possible number of columns , (8) should turn into an equality. Taking into account (9), let (10) where Obviously,…”

Section: Letmentioning

confidence: 99%

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On a new class of codes for identifying vertices in graphs

Karpovsky

Chakrabarty

Levitin

1998

IEEE Trans. Inform. Theory

379

321

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Abstract-We investigate a new class of codes for the optimal covering of vertices in an undirected graph G such that any vertex in G can be uniquely identified by examining the vertices that cover it. We define a ball of radius t centered on a vertex v to be the set of vertices in G that are at distance at most t from v: The vertex v is then said to cover itself and every other vertex in the ball with center v: Our formal problem statement is as follows: Given an undirected graph G and an integer t 1, find a (minimal) set C of vertices such that every vertex in G belongs to a unique set of balls of radius t centered at the vertices in C: The set of vertices thus obtained constitutes a code for vertex identification. We first develop topology-independent bounds on the size of C: We then develop methods for constructing C for several specific topologies such as binary cubes, nonbinary cubes, and trees. We also describe the identification of sets of vertices using covering codes that uniquely identify single vertices. We develop methods for constructing optimal topologies that yield identifying codes with a minimum number of codewords. Finally, we describe an application of the theory developed in this paper to fault diagnosis of multiprocessor systems.

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Section: Letmentioning

confidence: 99%

“…Each also has direct communication paths to other neighbor processors through the edges of the cube. An example of a commercial binary-cube computer is the NCUBE/ten, which is a ten-dimensional system developed by NCUBE Corporation [8], [14].…”

Section: A Binary Cubesmentioning

confidence: 99%

On a new class of codes for identifying vertices in graphs

Karpovsky

Chakrabarty

Levitin

1998

IEEE Trans. Inform. Theory

379

321

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“…There are a number of other research and commercial machines that have also chosen the message-passing distributed-memory MIMD approach [34,9,29,18,27]. The difference between the Mayfly effort and these other machines is an increased level of concern with what represents a general-purpose scalable system architecture.…”

Section: Davismentioning

confidence: 99%

Mayfly: A general-purpose, scalable, parallel processing architecture

Davis

1992

Lisp and Symbolic Computation

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Abstract. The Mayfly is a scalable general-purpose parallel processing system being designed at HP Laboratories, in collaboration with colleagues at the University of Utah. The system is intended to efficiently support parallel variants of modern programming languages such as Lisp, Prolog, and Object Oriented Programming models. These languages impose a common requirement on the hardware platform to support dynamic system needs such as runtime type checking and dynamic storage management. The main programming language for the Mayfly is a concurrent dialect of Scheme. The system is based on a distributed-memory model, and communication between processing elements is supported by message passing. The initial prototype of Mayfly will consist of 19 identical processing elements interconnected in a hexagonal mesh structure. In order to achieve the goal of scalable performance, each processing element is a parallel processor as well, which permits the application code, runtime operating system, and communication to all run in parallel. A 7 processing element subset of the prototype is presently operational. This paper describes the hardware architecture after a brief background synopsis of the software system structure. I n t r o d u c t i o nThe goal of the M a y f l y effort was to produce a general-purpose scalable parallel processor. More specifically we sought to produce a machine that: Would achieve increased performance, primarily through parallelism, for both numeric and symbolic computations.Would exhibit a reasonable performance improvement as the number of processing elements in the system was increased. The argument of what constitutes reasonable performance scaling is difficult to precisely quantify and subsequently this issue will be addressed in more detail, but it is clear that logarithmic performance scaling is not generally cost-effective, and that achieving linear speedup over a wide range of applications would be ideal but perhaps impossible to attain.

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“…The hypercube interconnection network, for instance, has been used in many existing commercial parallel processors such as the Intel iPSC/860 [7], NCUBE/7 [3], and the Connection Machine [4]. More recently, Akers and Krishnamurthy [8] introduced a class of graphs, known as Cayley Graphs, on which communication-efficient interconnection networks with good fault-tolerance properties can be constructed.…”

Section: Introductionmentioning

confidence: 99%

Deadlock-free wormhole routing algorithms for star graph topology

Ravikumar

Goel²

1995

IEE Proc., Comput. Digit. Tech.

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For constructing massively parallel multicomputers with over 5000 processing nodes, the Star Graph topology is known to be better than the hypercube in terms of the average routing distance, the number of links per node, and the fault diameter. The authors present two deadlock-free algorithms for routing in Star Graph, assuming the Wormhole routing model. Both the algorithms use the concept of virtual channels introduced by Dally and Seitz. The first algorithm is non-optimal in terms of the average routing distance, but uses fewer virtual channels on the whole. The second algorithm is optimal in terms of routing performance, but requires a somewhat larger number of virtual channels per node.

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A Microprocessor-based Hypercube Supercomputer

Cited by 141 publications

References 9 publications

On a new class of codes for identifying vertices in graphs

On a new class of codes for identifying vertices in graphs

Mayfly: A general-purpose, scalable, parallel processing architecture

Deadlock-free wormhole routing algorithms for star graph topology

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