Thin-film transistors with a split gate structure have been continuously studied for integration into future electronic devices. By introduction of a gate gap, a thin-film transistor can perform various logic circuit operations within the single channel region. However, the impact of the gate gap on the electrical characteristics of split gate thinfilm transistors has not been well investigated. In this study, we fabricated and characterized split gate thin-film transistors to realize logic OR and AND operations and conducted technology-aided computer design simulations with Silvaco Atlas simulations for logic AND implementation. Using technology computer-aided design simulations, we systematically analyzed the impact of the gate gap on the overall device characteristics as well as electric fields, energy bands, and carrier concentrations with cutlines in the channel region. Furthermore, we implemented the split gate transistor on a flexible paper substrate, demonstrating its possibility through up to 1000 bending cycle tests and indicating its potential for integration into more advanced electronic devices.