A Modified Full Adder (MFA) with an introverted unique Design for Low Power VLSI Circuit Applications

Saravanan., M; K, Suresh Kumar.

doi:10.1109/icstsn53084.2022.9761342

Cited by 2 publications

(1 citation statement)

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“…Transmission gate logic and CMOS are used in the modified full adder (MFA) design to minimize propagation latency and power consumption. The MFA generates a power delay with only 12 transistors plus an inverted XOR, NOR, and sum-generating module [7]. We describe a modified hybrid full adder (HFA) circuit with reduced latency, full swing outputs, and enhanced performance.…”

Section: IImentioning

confidence: 99%

Design of Full Swing Carry Generator Using Mentor Graphics

Venkatachari¹,

Priyanka.²,

Adapala³

et al. 2023

IJRASET

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A Full adder is built specifically for creating full-swing carry output utilizing Mentor graphics in this project. Mentor Graphics is electronic design automation software that is used to create superior electronic devices more quickly and costeffectively. The proposed circuit, which has a high driving capability, is suitable for a wide range of multistage structure applications. In digital processing equipment, full adders are used for multiple adders. This circuit design employs a unique mode to provide a full swing carry output, and its performance is governed by suitable inputs, static power reduction, and transistor series construction. The full adder proposed here is an efficient gate for Integrated Circuits (ICs). The performance between simulation and measurement produced a very good approximation result. When compared to other circuits, the cell's performance under variations indicates its excellent driving capabilities while consuming very little power and PDP. The circuit makes use of a one-of-a-kind module to provide full-swing Carry output, and its performance is governed by appropriate inputs, static power reduction, and transistor series formations.

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Section: IImentioning

confidence: 99%