A module generator for high-speed CMOS current output digital/analog converters

Abstract

This paper presents a module generator for Digital/Analog Converter (DAC) circuits. A combination of circuit simulation and DAC design equations is used to estimate performance. A new constrained optimization method is used to determine design variable values. The layout is created using stretching and tiling operations on a set of primitive cells. Close coupling of optimization and layout allows accurate incorporation of layout parasitics in optimization. Prototypes have been demonstrated for an 8-bit, 100-MHz specification, driving a 37.5-ohm video load, and a static 10-bit specification, driving a 4mA full-scale output current. Both designs use a 5-V supply in a standard 1.2 µm CMOS process. 1

Chameleon ART

“…One approach consists of developing specific block synthesis tools [1] which take a considerable effort and time. Therefore it must be justified by an extensive use of the generator.…”

INALSYS: a layout automation system based on analog layout constraints

“…What is worse is that they are error-prone and requires an expensive maintenance cost because of large module library [5][6]. The latter generators require a long execution time due to its optimization step.…”