1997
DOI: 10.1109/68.554510
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A monolithic optoelectronic receiver in standard 0.7-μm CMOS operating at 180 MHz and 176-fJ light input energy

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Cited by 16 publications
(3 citation statements)
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“…The comparison to other published integrating optical receivers, due to their digital operation, is strongly technology dependent in terms of speed when scaled to shorter nodes; in particular [ 8 , 9 ], achieve gigabit operation (1 Gbit/s and 1.2 Gbit/s) thanks to their implementation in 250 nm and 90 nm CMOS, whereas [ 12 ] operates at 320 Mbit/s and [ 7 ] at 180 Mbit/s using, respectively, 0.8 μm and 0.7 μm CMOS. In terms of sensitivity, the fabricated prototype achieves a 9.5 dB improvement over [ 8 ], 6.6 dB over [ 9 ], 9.4 dB over [ 12 ] in single-beam operation, and 14 dB over [ 7 ]. For its part, the receiver in [ 6 ] achieves a high −29.0 dBm sensitivity in a 0.35 μm CMOS process, but at a bit rate of just 5 Mbit/s.…”
Section: Comparison and Conclusionmentioning
confidence: 99%
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“…The comparison to other published integrating optical receivers, due to their digital operation, is strongly technology dependent in terms of speed when scaled to shorter nodes; in particular [ 8 , 9 ], achieve gigabit operation (1 Gbit/s and 1.2 Gbit/s) thanks to their implementation in 250 nm and 90 nm CMOS, whereas [ 12 ] operates at 320 Mbit/s and [ 7 ] at 180 Mbit/s using, respectively, 0.8 μm and 0.7 μm CMOS. In terms of sensitivity, the fabricated prototype achieves a 9.5 dB improvement over [ 8 ], 6.6 dB over [ 9 ], 9.4 dB over [ 12 ] in single-beam operation, and 14 dB over [ 7 ]. For its part, the receiver in [ 6 ] achieves a high −29.0 dBm sensitivity in a 0.35 μm CMOS process, but at a bit rate of just 5 Mbit/s.…”
Section: Comparison and Conclusionmentioning
confidence: 99%
“…An alternative to TIA-based optical receivers that is gaining attention for communications applications with a tight power budget is the integrating optical receiver. Already introduced for optical memories [ 6 ] or highly parallel optical interconnects [ 7 ], it mainly uses digital circuitry, which results in a drastic reduction in power consumption and makes it compatible with process scaling to achieve higher data rates. Recently reported implementations achieve Gbit/s with energy efficiencies of 0.9 pJ/bit [ 8 ] and 4.5 pJ/bit [ 9 ].…”
Section: Introductionmentioning
confidence: 99%
“…For the optical interconnections we assume that the light transmitters ͑MQW modulators or VCSEL's͒ are flip-chip bonded to silicon and that integrated reverse-biased silicon p-n junctions are used as photodiodes. Note that standard silicon p-n diodes are speed limited 11 well below 1 GHz but that other types of faster detectors ͑e.g., hybridized MQW p-i-n diodes or GaAs metal-semiconductor-metal de-tectors͒ could be used for the high-speed rates. ͑Interestingly enough, MQW p-i-n diodes have similar parasitics, although they do exhibit better responsivity than silicon p-n diodes of similar dimensions even when accounting for the hybrid integration.͒ A10.…”
Section: Assumptionsmentioning
confidence: 99%