A Multi-Bit Neuromorphic Weight Cell Using Ferroelectric FETs, suitable for SoC Integration

Obradovic, B.; Rakshit, Titash; Hatcher, Ryan; Kittl, Jorge; Sengupta, Rwik; Hong, Joon Goo; Rödder, M.

doi:10.1109/jeds.2018.2817628

Cited by 17 publications

(23 citation statements)

References 16 publications

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“…While many hardware architectures for MAC have been considered, three specific examples are discussed in this work. All are based on the Ferroelectric FET (FeFET) NVM for weight storage [2]. There is no particular significance to the choice of FeFET in the context of HW-aware training; it is merely used here for the purpose of example.…”

Section: Hardware Architecturesmentioning

confidence: 99%

“…The weights themselves are FeFETs; the conductance level of the FeFETs (each with a grounded gate terminal) determines their weight value. Details of the programming can be found in [2].…”

Section: B Ternary Conductive Crossbarmentioning

confidence: 99%

“…A possible approach to multi-bit crossbars (two bits in this case) is illustrated in Fig. 5 [2]. The weight cell consists of multiple branches, each comprised of a series combination of an FeFET and a passive resistor.…”

Section: Multi-bit Crossbarmentioning

confidence: 99%

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High-Accuracy Inference in Neuromorphic Circuits using Hardware-Aware Training

Obradovic¹,

Rakshit²,

Hatcher³

et al. 2018

Preprint

Self Cite

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Neuromorphic Multiply-And-Accumulate (MAC) circuits utilizing synaptic weight elements based on SRAM or novel Non-Volatile Memories (NVMs) provide a promising approach for highly efficient hardware representations of neural networks. NVM density and robustness requirements suggest that off-line training is the right choice for "edge" devices, since the requirements for synapse precision are much less stringent. However, off-line training using ideal mathematical weights and activations can result in significant loss of inference accuracy when applied to non-ideal hardware. Non-idealities such as multi-bit quantization of weights and activations, nonlinearity of weights, finite max/min ratios of NVM elements, and asymmetry of positive and negative weight components all result in degraded inference accuracy. In this work, it is demonstrated that non-ideal Multi-Layer Perceptron (MLP) architectures using low bitwidth weights and activations can be trained with negligible loss of inference accuracy relative to their Floating Point-trained counterparts using a proposed off-line, continuously differentiable HW-aware training algorithm. The proposed algorithm is applicable to a wide range of hardware models, and uses only standard neural network training methods. The algorithm is demonstrated on the MNIST and EMNIST datasets, using standard MLPs.

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Section: Hardware Architecturesmentioning

confidence: 99%

“…The weights themselves are FeFETs; the conductance level of the FeFETs (each with a grounded gate terminal) determines their weight value. Details of the programming can be found in [2].…”

Section: B Ternary Conductive Crossbarmentioning

confidence: 99%

See 1 more Smart Citation

High-Accuracy Inference in Neuromorphic Circuits using Hardware-Aware Training

Obradovic¹,

Rakshit²,

Hatcher³

et al. 2018

Preprint

Self Cite

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show abstract

“…The emergence of nonvolatile technology and memristor (the “missing element” of circuit) [ 25,26 ] offers novel opportunities to design artificial neurons and synapses that possess stronger neurobiological characteristics. Various material classes have been explored to make structures for this purpose, including the resistive random‐access memory (RRAM), [ 27–32 ] phase change materials (PCM), [ 33–37 ] ferroelectric materials, [ 38–42 ] and spintronic devices. [ 43–47 ] Comparing to other types, spintronic devices are arguably the most promising technology for neuromorphic computing.…”

Section: Introductionmentioning

confidence: 99%

Prospect of Spintronics in Neuromorphic Computing

Zhou

Chen

2021

Adv Elect Materials

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Neuromorphic computing emulates a biological brain at different levels of the computer hierarchy by exploiting brain‐inspired principles in designing novel devices, algorithms, and architectures. It is believed to have a lower power budget and a higher efficiency in performing cognitive tasks, and is arguably the most promising approaches for next‐generation artificial intelligence. Despite the potentials, progress of neuromorphic computing is constrained by a lack of dedicated hardware. Spintronics is a fast‐evolving discipline that exploits the spin degree of freedom in electronics. The interplay of magnetic and electrical properties of spintronic devices gives rise to a wide range of amazing phenomena, which are both intrinsically conducive to neuromorphic computing and highly compatible with conventional manufacturing technologies. Here, the development of neuromorphic computing with reference to spintronics is reviewed. The state‐of‐the‐art spintronic technologies, such as the magnetic tunnel junction, spin–orbit torque, domain wall propagation, magnetic skyrmions, and antiferromagnet, are highlighted and how they can used for artificial neurons and synapses in different artificial neural networks are discussed. The technical challenges to be overcome for realizing more powerful all‐spin artificial neural networks are also evaluated.

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“…In recent years electron devices based on ferroelectric materials have attracted a lot of interest well beyond FeRAM memories. Negative capacitance transistors (NC-FETs) have been investigated as steep slope transistors [1], [2], and Ferroelectric FETs (Fe-FETs) are under intense scrutiny also as synaptic devices for neuromorphc computing, where the minor loops in ferroelectrics can allow to achieve multiple values of conductance in read mode [3], [4], [5]. Furthermore, the persistence of ferroelectricity in ultra-thin ferroelectric layers paved the way to ferroelectric tunnelling junctions [6], where a polarization dependent tunneling current can be exploited to realize high impedance memristors, amenable for ultra power-efficient and thus massive parallel computation.…”

Section: Introductionmentioning

confidence: 99%