2017 30th IEEE International System-on-Chip Conference (SOCC) 2017
DOI: 10.1109/socc.2017.8226076
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A multi-format floating-point multiplier for power-efficient operations

Abstract: Abstract-In this work, we present a radix-16 multi-format multiplier to multiply 64-bit unsigned integer operands, doubleprecision and single-precision operands. The multiplier is sectioned in two lanes such that two single-precision multiplications can be computed in parallel. Radix-16 is chosen for the reduced number of partial products and the resulting power savings. The experimental results show that high power efficiency is obtained by issuing two single-precision multiplications per cycle. Moreover, by … Show more

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