A multiplierless parallel HEVC quantization hardware for real-time UHD 8K video coding

Braatz, Luciano; Agostini, Luciano; Porto, Marcelo

doi:10.1109/iscas.2017.8050704

Cited by 4 publications

(3 citation statements)

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“…The SAT-video coding uses a fixed block ( 88  )for both intra-and inter-coding. Therefore, Equations ( 10), (11), and (12) are represented by clock cycles latencies, including latency#1 ( 1 ), latency#2 ( 2 ), and latency#3 ( 3 ), respectively, as displayed in Figure 15. where w is the frame width.…”

Section: Experiments Resultsmentioning

confidence: 99%

“…In hardware reduction methods, the motion estimation (ME) technique based on pipelined design and rapid computing of the minimum sum absolute difference (SAD) on FPGA are introduced to speed up computation [6][7] [8][9] [10]. Moreover, the hardware efficiencies of Q reduce the computation complexity [11] [12]. This paper proposes a highly efficient video encoding, named as SATvideo coding, optimized for satellites' limited hardware W resources and power and also achieves the target compression ratio (CR) and acceptable [13] peak signal-tonoise ratio (PSNR), based on hardware resource reduction with high-quality decompressed remotely sensing video.…”

Section: Introductionmentioning

confidence: 99%

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Edge Computing-Based SAT-Video Coding for Remote Sensing

et al. 2022

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This paper proposes an edge computing-based video coding implementation on an Earth observation satellite (SAT-video coding), which can encode video using limited resources and the power of mini/microsatellites. SAT-video coding proposes a hardware-related quantization (Q) function, hardware reduction of the motion estimation (ME) method, and simplified entropy coding (EC), which reduces the computation complexity. The hardware-related Q reduces hardware resource and power consumption by 72% and 55%, respectively, compared with traditional Q implementation. The hardware reduction of ME reduces resource use compared with regular ME implementation (59 % of lookup tables [LUTs] and 79% of Registers). The total number of LUTs used for the simplified EC function is also much lower than other EC hardware implementations. The SAT-video encoder IP uses fewer hardware resources, and the power consumption is estimated at 0.0894 W at a high working frequency (125 MHz). The SAT-video encoding speed is 18.95 frames per second for 2560×2560 video. Therefore, the proposed SAT-video coding is an edge computation suitable for micro/minisatellites. The coding efficiency records the highest compression ratio at 33.8, with a peak signal-to-noise ratio of 34.46 dB. With the important task of designing edge computing based on satellite video encoding, these are adequate values for remote sensing video.INDEX TERMS Video compression, remote sensing video, hardware acceleration, satellite.

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Section: Experiments Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Edge Computing-Based SAT-Video Coding for Remote Sensing

et al. 2022

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“…Some works proposing hardware solutions for the HEVC transforms can be found in [54], [55] and [56]. Some works have also been published focusing on hardware for the quantization module, such as [57] and [58].…”

Section: Transforms and Quantizationmentioning

confidence: 99%

Modern Video Coding: Methods, Challenges and Systems

Palau

Silveira

Domanski

et al. 2021

JICS

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With the increasing demand for digital video applications in our daily lives, video coding and decoding become critical tasks that must be supported by several types of devices and systems. This paper presents a discussion of the main challenges to design dedicated hardware architectures based on modern hybrid video coding formats, such as the High Efficiency Video Coding (HEVC), the AOMedia Video 1 (AV1) and the Versatile Video Coding (VVC). The paper discusses eachstep of the hybrid video coding process, highlighting the main challenges for each codec and discussing the main hardware solutions published in the literature. The discussions presented in the paper show that there are still many challenges to be overcome and open research opportunities, especially for the AV1 and VVC codecs. Most of these challenges are related to the high throughput required for processing high and ultrahigh resolution videos in real time and to energy constraints of multimedia-capable devices.

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