A new and generalized structure of single‐phase and three‐phase cascaded multilevel inverter with reduced power components

Mahato, Bidyut; Majumdar, Saikat; Jana, Kartick Chandra

doi:10.1002/2050-7038.12187

Cited by 13 publications

(32 citation statements)

References 61 publications

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“…In order to demonstrate the efficiency of the basic 3 kW, nine‐level inverter operating at an output power of 434.7 W in the laboratory using SPWM control technique [19, 20] at a switching frequency 3 kHz, different power losses (conduction loss, switching loss and voltage ripple loss) are calculated in the next section. For the input DC voltage source magnitude of 120 V, the load resistance of R L = 66 Ω and power output of 434.7 W at 50 Hz, the conduction loss, switching loss and voltage ripple losses [13, 24] for PWM inverter is calculated as 8.63, 0.251, and 6.73 W, respectively at a switching frequency of 3 kHz. The corresponding efficiency of the basic nine‐level inverter at this power output is calculated as 96.5%.…”

Section: Design Parameters Of the Switches And Determination Of The Cmentioning

confidence: 99%

“…In order to calculate the switching loss of the basic nine‐level inverter operating at 3 kHz switching frequency having eight uni‐directional switches and one bi‐directional switch, the total switching loss during turn‐on and turn‐off periods are calculated similar based on [24]. The switching frequency of the uni‐directional switches ( S 1 , S 2 ,

S_{1}^{'}

S_{2}^{'}

, S 3 ,

S_{3}^{'}

, H and H ′) are expressed as f swt.U and the switching frequency of the bi‐directional switch (B) for the nine‐level inverter is expressed as f swt.B .…”

Section: Power Loss Analysis Of the Basic Nine‐level Invertermentioning

confidence: 99%

“…The switching frequency of the uni‐directional switches ( S 1 , S 2 ,

S_{1}^{'}

S_{2}^{'}

, S 3 ,

S_{3}^{'}

, H and H ′) are expressed as f swt.U and the switching frequency of the bi‐directional switch (B) for the nine‐level inverter is expressed as f swt.B . Therefore, the total switching loss of the basic nine‐level inverter is the sum of the switching loss of the uni‐directional switches ( P swt.U ) and the bi‐directional switch ( P swt.B ) is determined as

P_{sw, total} = P_{sw, normalU} + P_{sw, normalB}

Based on the switching loss calculation technique presented in [24], (30) can be further derived considering V U j is the blocking voltage of the j th uni‐directional switch operate at the switching frequency of f U j , whereas V B j is the blocking voltage of the j th bi‐directional switch operate at a frequency of f B j . For a fixed load current I and total turn‐on ( t ON ) and turn‐off time ( t OFF ) of the selected switches, (30) can be further represented as

P_{sw, total} = \frac{I ()(, t_{ON} + t_{OFF})}{6} [{false\sum}_{j = 1}^{8} V_{normalU j} f_{normalU j} + {false\sum}_{j = 1}^{1} V_{normalB j} f_{normalB j}]

The parameter I ( t ON + t OFF )/6 is assumed constant ( µ ) [24] for a specific value of load current ( I ), turn‐on and turn‐off time.…”

Section: Power Loss Analysis Of the Basic Nine‐level Invertermentioning

confidence: 99%

“…Therefore, the total switching loss of the basic nine‐level inverter is the sum of the switching loss of the uni‐directional switches ( P swt.U ) and the bi‐directional switch ( P swt.B ) is determined as

P_{sw, total} = P_{sw, normalU} + P_{sw, normalB}

P_{sw, total} = \frac{I ()(, t_{ON} + t_{OFF})}{6} [{false\sum}_{j = 1}^{8} V_{normalU j} f_{normalU j} + {false\sum}_{j = 1}^{1} V_{normalB j} f_{normalB j}]

The parameter I ( t ON + t OFF )/6 is assumed constant ( µ ) [24] for a specific value of load current ( I ), turn‐on and turn‐off time. Thus, (31) can be modified as

P_{sw, total} = μ (][, \sum_{j = 1}^{8} V_{U j} f_{U j} + \sum_{j = 1}^{1} V_{B j} f_{B j})

For the basic nine‐level inverter of fundamental frequency f o = 50 Hz operating under SPWM at 3 kHz switching frequency, the operating frequency of uni‐directional switches S 1 and

S_{1}^{'}

is 10 f 0 (i.e.…”

Section: Power Loss Analysis Of the Basic Nine‐level Invertermentioning

confidence: 99%

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Analysis and implementation of a generalised switched‐capacitor multi‐level inverter having the lower total standing voltage

Majumdar

Mahato

Jana

2020

IET power electron.

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Most of the switched capacitor multi‐level inverters (SC‐MLIs) are designed with a single isolated voltage source and capacitors where voltage levels are obtained by the addition of these sources only. The common problems arise in SC‐MLIs are an unequal number of conducting paths, higher voltage drop across capacitors, sum of total inverter DC link voltages across the highest voltage rated switches and higher total standing voltage (TSV). The motivation of this work is to design a hybrid generalized SC‐MLI with reduced components aiming to maintain a constant voltage across the capacitors, to achieve higher voltage gain with minimum components used, minimum conducting paths, lower TSV, cost‐effective and an efficient inverter. A generalised SC‐MLI structure is also proposed, which can multiply the voltage across the capacitors in a binary asymmetrical manner. The design parameters of the proposed hybrid SC‐MLI topology are compared with the recently developed SC‐MLIs in terms of the number of switches, capacitors, TSV, conducting switches and industrial components cost to prove its superiority and effectiveness of the proposed inverter. The experimental prototype of a specimen 9‐level and 17‐level inverters are implemented using DS1103 and the corresponding results are presented.

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Section: Design Parameters Of the Switches And Determination Of The Cmentioning

confidence: 99%

S_{1}^{'}

S_{2}^{'}

, S 3 ,

S_{3}^{'}

, H and H ′) are expressed as f swt.U and the switching frequency of the bi‐directional switch (B) for the nine‐level inverter is expressed as f swt.B .…”

Section: Power Loss Analysis Of the Basic Nine‐level Invertermentioning

confidence: 99%

“…The switching frequency of the uni‐directional switches ( S 1 , S 2 ,

S_{1}^{'}

S_{2}^{'}

, S 3 ,

S_{3}^{'}

P_{sw, total} = P_{sw, normalU} + P_{sw, normalB}

P_{sw, total} = \frac{I ()(, t_{ON} + t_{OFF})}{6} [{false\sum}_{j = 1}^{8} V_{normalU j} f_{normalU j} + {false\sum}_{j = 1}^{1} V_{normalB j} f_{normalB j}]

The parameter I ( t ON + t OFF )/6 is assumed constant ( µ ) [24] for a specific value of load current ( I ), turn‐on and turn‐off time.…”

Section: Power Loss Analysis Of the Basic Nine‐level Invertermentioning

confidence: 99%

P_{sw, total} = P_{sw, normalU} + P_{sw, normalB}

P_{sw, total} = \frac{I ()(, t_{ON} + t_{OFF})}{6} [{false\sum}_{j = 1}^{8} V_{normalU j} f_{normalU j} + {false\sum}_{j = 1}^{1} V_{normalB j} f_{normalB j}]

The parameter I ( t ON + t OFF )/6 is assumed constant ( µ ) [24] for a specific value of load current ( I ), turn‐on and turn‐off time. Thus, (31) can be modified as

P_{sw, total} = μ (][, \sum_{j = 1}^{8} V_{U j} f_{U j} + \sum_{j = 1}^{1} V_{B j} f_{B j})

For the basic nine‐level inverter of fundamental frequency f o = 50 Hz operating under SPWM at 3 kHz switching frequency, the operating frequency of uni‐directional switches S 1 and

S_{1}^{'}

is 10 f 0 (i.e.…”

Section: Power Loss Analysis Of the Basic Nine‐level Invertermentioning

confidence: 99%

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Analysis and implementation of a generalised switched‐capacitor multi‐level inverter having the lower total standing voltage

Majumdar

Mahato

Jana

2020

IET power electron.

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“…In any grid-tied inverter, proper synchronism is required along with high efficiency, low THD, high-quality power, and low dv/dt stress across power switches. 5,6 The MLI is conventionally classified into CHB, FC, and NPC. FC and NPC increase output voltage levels using floating capacitors and clamping diode, respectively.…”

Section: Introductionmentioning

confidence: 99%

Implementation of cascaded asymmetrical multilevel inverter for renewable energy integration

Anand

Singh

2021

Circuit Theory & Apps

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This paper aims to develop a new cascaded asymmetrical multilevel inverter with less number of switches for photovoltaic power generation. The structure contains three sources and 11 switches. A design of proposed structure is suggested for PV application. A few more algorithms for cascade extension are also proposed to obtained maximum voltage levels using least numbers of switching devices. PD LS-PWM modulation is used to control gate pulses of the switches.The structure produce 15 levels using one inverter, whereas 85 levels using a cascaded inverter. The magnitude of sources in cascade inverter is governed by algorithms. A comparative assessment for optimal algorithm is developed considering, sources, switches, and other performance parameters. The simulation and hardware is performed for 15-level and 85-level asymmetrical inverter for variation in modulation index and frequency. The efficiency of multilevel inverter is evaluated using PSIM tool. The performance indices, power loss analysis, switching stresses, and blocking voltages across the switches are simulated and validated. The cascade structure, 85 levels produce high quality waveform, for which THD is less than 5%. Thus, this structure suits series combination of various PV panels and achieve power utilising renewable energy sources.

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Comparative analysis of switching angle calculation methods for multilevel inverters

Muthyala

Dhabale

2021

Int Trans Electr Energ Syst

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Summary A multilevel inverter produces an output to approximate a desired sine wave. The closeness of the output waveform to the sine wave depends on the logic applied for switching angle calculation, resulting in different switching angle calculation methods. In this paper, various switching angle calculation methods are compared based on of the parameters quantifying the quality of the output waveform. The main focus of this work is on the study of convergence of the output waveform to a smooth waveform as number of levels increases theoretically. The convergence is analytically proved and validated numerically by computing up to 201 levels. Also, a parameter quantifying the deviation of the output waveform from the sine wave is defined, and its closed form expression is derived. This parameter is strongly correlated to and computationally less expensive than the total harmonic distortion. Hence, the deviation is proposed as a better measure of the quality of the output wave form. The convergence and the deviation of the output waveform are also used as the basis of the comparison of different switching angle calculation methods. These two give a better insight into the switching angle calculation methods. The analysis presented in this paper provides a good understanding of various switching angle computation methods and helps in choosing an appropriate method for a given application.

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A new and generalized structure of single‐phase and three‐phase cascaded multilevel inverter with reduced power components

Cited by 13 publications

References 61 publications

Analysis and implementation of a generalised switched‐capacitor multi‐level inverter having the lower total standing voltage

Analysis and implementation of a generalised switched‐capacitor multi‐level inverter having the lower total standing voltage

Implementation of cascaded asymmetrical multilevel inverter for renewable energy integration

Comparative analysis of switching angle calculation methods for multilevel inverters

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