A new and reliable direct parasitic extraction method for MESFETs and HEMTs

Tayrani, R.; Gerber, J.; Daniel, T.; Pengelly, Rayrnond S.; Rohde, Ulrich L.

doi:10.1109/euma.1993.336593

Cited by 84 publications

(60 citation statements)

References 5 publications

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“…The S-parameters of the device are measured by a 50 GHz vector network analyzer and the large-signal measurements are carried out by a 50 GHz large-signal network analyzer (LSNA) [13]. After applying the two-step de-embedding method [14], the small-signal ECPs are extracted using cold-conditions [15,16] and hot-operating conditions [17]. The ECPs have been extracted for V gs and V ds both ranging from 0 to 1.2 V. Tables I and II includes the list of the extracted extrinsic and intrinsic shell ECPs values for bias condition V gs 5 V ds 5 1.2 V, respectively [17].…”

Section: Resultsmentioning

confidence: 99%

Simple and accurate approaches to implement the complex trans‐conductance suited for time‐domain simulators for small‐signal and large‐signal table‐based models

Homayouni¹,

Schreurs²,

Nauwelaers³

2010

Int J Numerical Modelling

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SUMMARYThis paper focuses on the implementation of table-based models of high-frequency transistors for timedomain simulators at microwave and mm-wave frequencies. In this frequency range, the channel is not capable of responding to the excitation instantaneously therefore, a delay-time exists between the channel response and the channel excitation. This delay is represented by a complex trans-conductance in terms of circuit elements. The high-frequency models of transistors are required to have the implementation of complex trans-conductance, where the complex part accounts mathematically for the delay-time between the channel response and the channel excitation. This paper presents simple and accurate approaches to incorporate the complex trans-conductance in both small-signal and large-signal table-based models for time-domain simulators (MOS-AK International Meeting. Eindhoven, Netherlands, April 2008). Implementation approach for each model, small-signal and large-signal, is presented in separated sections. In the first step, the delay is realized by the introduction of an ideal transmission line between the channel excitation and the channel response. As transmission lines are not generally suitable for time-domain simulations, a lumped element equivalent network is introduced in the second step. The latter approach is fully compatible with time-domain simulators but frequency limitation, determined by the delay-time value itself, is introduced. Then the implementation of the complex trans-conductance in large-signal model is introduced. In terms of large-signal behavior, delay-time is important to achieve a non-quasi static model. Yet again there is limitation in terms of the frequency range that is determined by the delay value itself. The methodology is illustrated on the small-signal and the large-signal equivalent circuit of a Multi-Fin MOSFET transistor. Simulations are carried out by Cadence Spectre and Agilent ADS simulators, and comparisons are carried out between the simulation results and the measurements.

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Section: Resultsmentioning

confidence: 99%

Simple and accurate approaches to implement the complex trans‐conductance suited for time‐domain simulators for small‐signal and large‐signal table‐based models

Homayouni¹,

Schreurs²,

Nauwelaers³

2010

Int J Numerical Modelling

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“…Here, C gsp , C gdp and C dsp provide intrinsic substitute of pinched of cold FET part of circuit. Assumption is made as [27] 12 dsp pd CC …”

Section: Extrinsic Parameters Extraction and Analytical Expressionsmentioning

confidence: 99%

“…Therefore, the value of individual intrinsic parameter can be derived from Equations (17) to (20) (27)   Extrinsic parameters as listed in Table 1, are extracted for 1x100µm 2 gate size device at ambient temperature (T) =305K. The capacitances are extracted for f L =0 to 5GHz, V gs = -8V, V ds =0V.…”

Section: Intrinsic Parameters Extraction and Analytical Expressionsmentioning

confidence: 99%

TCAD Simulations and Small Signal Modeling of DMG AlGaN/GaN HFET

Yadav¹,

Pathak²,

Mehra³

2017

IJECE

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This article presents extraction of small signal model parameters and TCAD simulation of novel asymmetric field plated dual material gate AlGaN/GaN HFET first time. Small signal model is essential for design of LNA and microwave electronic circuit by using the proposed superior performance HFET structure. Superior performances of device are due to its dual material gate structure and field plate that can provide better electric field uniformity, suppression of short channel effects and improvement in carrier transport efficiency. In this article we used direct parameter extraction methodology in which S-parameters of device were measured using pinchoff cold FET biasing. The measured S-parameters are then transformed into Y-parameters to extract capacitive elements and then in to Z-parameters to extract series parasitic elements. Intrinsic parameters are extracted from Y-parameters after de-embedding all parasitic elements of devce. Microwave figure of merits and dc performance are also studied for proposed HFET. The important figure of merits of device reported in the paper include transconductance, drain conductance, current gain, transducer power gain, available power gain, maximum stable gain, maximum frequency of oscillation, cut-off frequency, stability factor and time delay. Reported results are valdated with experimental and simulation results for consistency accuracy. Keyword:Cutoff frequency HEMT model Microwave figure of merits Parameters extraction Small signal model

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“…Step 1) Using cold S-parameters measurements [45,46] at the reference temperature T 0 (+27 • C), the parasitic and extrinsic elements of the model are extracted and optimized over the frequency range of interest.…”

Section: Model Topology and Parameters Estimation Strategymentioning

confidence: 99%

NONLINEAR MODELING OF TRAPPING AND THERMAL EFFECTS ON GaAs AND GaN MESFET/HEMT DEVICES

Chaibi¹,

Fernández

Mimouni³

et al. 2012

PIER

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Abstract-A novel nonlinear model for MESFET/HEMT devices is presented. The model can be applied to low power (GaAs) and high power (GaN) devices with equal success. The model provides accurate simulation of the static (DC) and dynamic (Pulsed) I-V characteristics of the device over a wide bias and ambient temperature range (from −70 • C to +70 • C) without the need of an additional electro-thermal sub-circuit. This is an important issue in high power GaN HEMT devices where self-heating and current collapse due to traps is a more serious problem. The parameter extraction strategy of the new model is simple to implement. The robustness of the model when performing harmonic balance simulation makes it suitable for RF and microwave designers. Experimental results presented demonstrate the accuracy of the model when simulating both the small-signal and largesignal behavior of the device over a wide range of frequency, bias and ambient temperature operating points. The model described has been implemented in the Advanced Design System (ADS) simulator to validate the proposed approach without convergence problems.

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A new and reliable direct parasitic extraction method for MESFETs and HEMTs

Cited by 84 publications

References 5 publications

Simple and accurate approaches to implement the complex trans‐conductance suited for time‐domain simulators for small‐signal and large‐signal table‐based models

Simple and accurate approaches to implement the complex trans‐conductance suited for time‐domain simulators for small‐signal and large‐signal table‐based models

TCAD Simulations and Small Signal Modeling of DMG AlGaN/GaN HFET

NONLINEAR MODELING OF TRAPPING AND THERMAL EFFECTS ON GaAs AND GaN MESFET/HEMT DEVICES

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