A New Approach and Tool in Verifying Asynchronous Circuits

Abstract

Abstract-Research in asynchronous circuit approach has been carried out recently when asynchronous circuits are presented more widely in electronic systems. As they are more important in human life, their correctness should be considered carefully. Although there are some EDA tools for design and synthesis of asynchronous circuits, they are lack of methods for verifying the correctness of the produced circuits. In this work, we are about to propose a verification method and apply it in making a new version of the PAiD tool that can enable engineers to design, synthesize and verify asynchronous circuits. Experiments in verifying circuits have been also provided in this work.

Model Checking Control Flow Petri Nets Using PAT

“…In [5], a combination of Petri Net and Data Flow Graph (PN-DFG) [7], which is used as the immediate-level language in representing asynchronous circuits, have been transformed into NuSMV, a very famous open-source symbolic model checking tool. The experimentation results have shown that the NuSMV models of the circuits can be verified easily [6].…”

“…Research in representing Petri Nets in verification tools have been carried out recently [3] [4] [5] [6]. In [5], a combination of Petri Net and Data Flow Graph (PN-DFG) [7], which is used as the immediate-level language in representing asynchronous circuits, have been transformed into NuSMV, a very famous open-source symbolic model checking tool.…”