A new cascaded quasi-z source based single phase seven level inverter

Rahul, Jammy Ramesh; Kirubakaran, A.

doi:10.1109/sceecs.2016.7509349

Cited by 2 publications

(3 citation statements)

References 9 publications

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“…A Z-source-based 7L inverter 11 with reduced switch count is reported, which is derived from a combination of Z-source networks and multilevel dc-link inverter. 17 Moreover, the proposed topology is modular, provides better output voltage regulation, and is highly suitable for multistring-based PV applications. [13][14][15] However, these topologies were associated with problems of more dc sources and passive components for more output voltage levels.…”

Section: Introductionmentioning

confidence: 99%

“…Therefore, a new structure of single-phase qZs-based seven-level inverter is proposed with the features of reduced switch count, simple control, and high efficiency. 17 Moreover, the proposed topology is modular, provides better output voltage regulation, and is highly suitable for multistring-based PV applications. The performance of the proposed topology is studied with the boundary condition between CCM and DCM for different loads under the steady state in Section 2.…”

Section: Introductionmentioning

confidence: 99%

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FPGA‐based implementation of single‐phase seven‐level quasi‐Z‐source inverter

Rahul

Kirubakaran

2019

Circuit Theory & Apps

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In this paper, a new single-phase seven-level quasi-Z-source (qZs) inverter with reduced switch count for multistring photovoltaic applications is proposed, which is capable of supplying both direct current (dc) and alternating current (ac) loads simultaneously. The proposed configuration is derived from a combination of qZs networks and asymmetrical seven-level inverter. The front-end qZs converter boosts the input voltage obtained from the dc sources to the desired value, whereas the asymmetrical seven-level inverter performs dc-ac conversion with reduced switch count and provides better efficiency. The steady-state performance of the model is evaluated in both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) of operation. In addition, the dynamic performance of the model is tested for the load as well as input voltage changes. A simple proportional-integral (PI) controller is implemented in FPGA Spartan-6 Processor using Xilinx system generator blocks.An experimental prototype is also developed to validate the feasibility of the proposed topology. Finally, a brief comparative assessment is formulated with other topologies to show the merits of the proposed structure.KEYWORDS multilevel inverter, power losses, quasi-Z-source (qZs) network, total harmonic distortion (THD)

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

FPGA‐based implementation of single‐phase seven‐level quasi‐Z‐source inverter

Rahul

Kirubakaran

2019

Circuit Theory & Apps

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“…This motivates the authors to develop a multistring seven-level qZs based Asymmetrical inverter [17] with reduced dc sources, device count, size and increased overall efficiency for the gridconnected PV system. In this work, Quasi Z-source based dc-dc converter is used as the intermediate power conditioner between the PV and seven-level Asymmetrical inverter.…”

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confidence: 99%

Multistring seven-level quasi Z-source based asymmetrical inverter

Rahul¹,

Kirubakaran²

2019

IJEECS

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In this paper, a single-phase multistring seven-level Quasi-Z-source based Asymmetrical Inverter suitable for grid-connected photovoltaic (PV) system is presented. This topology is an upgrade of quasi-Z-source dc-dc (qZs) network and Asymmetrical multilevel inverter (AMLI). The AMLI generates higher number of levels with reduced switch count and number of sources when compared to symmetrical cascaded based MLI. The qZs network acts as an intermediate stage between the low-voltage PV array and AMLI, to enhance the output voltage gain of the inverter. The steady state performance the topology is verified through MATLAB simulation and experimentation. A laboratory prototype model is developed for a capacity of 200W to validate the theoretical studies. Finally, a comparative assessment of the proposed with the existing topologies is presented.

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A new cascaded quasi-z source based single phase seven level inverter

Cited by 2 publications

References 9 publications

FPGA‐based implementation of single‐phase seven‐level quasi‐Z‐source inverter

FPGA‐based implementation of single‐phase seven‐level quasi‐Z‐source inverter

Multistring seven-level quasi Z-source based asymmetrical inverter

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