A New Design Reuse Approach for Voip Implementation into Fpsocs and ASICS

Izeboudjen, Nouma; Lazib, Dalila; Bakiri, Mohammed; Abid, Feroudja; Titri, Sabrina; Louiz, Fatiha

doi:10.5121/ijsc.2013.4402

Cited by 4 publications

(1 citation statement)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…An alternative device that can be used to design the voice data packets reception is an FPGA [6]. The FPGA allows functions to be executed in a single configuration process where certain functions and its timing can be controlled [7][8][9]. The FPGA is also able to work in real time system [10] which is suitable for digital to analog voice processing.…”

Section: Introductionmentioning

confidence: 99%

Design of Digital to Analog Voice Data Packet Conversion from Ethernet Protocol using FPGA

Prasetio

Syauqy

2017

TELKOMNIKA

View full text Add to dashboard Cite

This paper describes a system that is designed to be able to receive packet voice signal using the Ethernet protocol in local networks using FPGA which was programmed decode the data packets. The digital data packets are then converted back into analog data that will be used to control another system. The design was implemented as four components consisting of frame starter unit, address matching unit, buffer unit and DAC processing unit. The system was designed on Xilinx development board using ISE design suite and simulated on ISIM. The test results showed that the system response was less than 40 ms. The result also showed that our proposed design only occupies 11% of number of slices and it also requires 5% of total IOBs on Xilinx Spartan 3-E.

show abstract

Section: Introductionmentioning

confidence: 99%