A new development framework based on efficient middleware for real-time embedded heterogeneous multicomputers

Janka, Randall S.

doi:10.1109/ecbs.1999.755890

Cited by 4 publications

(2 citation statements)

References 13 publications

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“…A partial response to this design challenge of real-time multiprocessor digital signal processing systems has been the development of various graphically-based frameworks, i.e., integrated sets of tools, such as GEDAE, 4 RIPPEN, 5 PGM ACT, 6 and PeakWare for RACE 7 [4] to provide computer-aided system engineering (CASE) support for system implementation [5], [6], [7]. In particular, these frameworks offer code generation that reduces the complexity of system configuration and communication coding, a quality known as "complexity control."…”

Section: Rsp Frameworkmentioning

confidence: 99%

Virtual benchmarking and model continuity in prototyping embedded multiprocessor signal processing systems

Janka

Wills

Baumstark

2002

IIEEE Trans. Software Eng.

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The complexity of hardware/software codesign of embedded real-time signal processing systems can be reduced by rapid system prototyping (RSP). However, existing RSP frameworks do not provide a sound specification and design methodology (SDM) because they require the designer to choose the implementation target before specification and design exploration and they do not work together coherently across development stages. This paper presents a new SDM, called MAGIC, that allows the designer to capture an executable specification model for use in design exploration to find the optimal multiprocessor technology before committing to that technology. MAGIC uses a technique called "virtual benchmarking," for early validation of promising architectures. The MAGIC SDM also exploits emerging open-standards computation and communication middleware to establish model continuity between RSP frameworks. This methodology has been validated through the specification and design of a moderately complex system representative of the signal processing domain: the RASSP Synthetic Aperture Radar benchmark. In this case study, MAGIC achieves three orders of magnitude speedup over existing virtual prototyping approaches and demonstrates the ability to evaluate competitive technologies prior to implementation. Transfer of this methodology to the system-on-a-chip domain using Cadence's Virtual Component Codesign infrastructure is also discussed with promising results. Index Terms-Hardware/software codesign, model continuity, open-standards middleware, specification and design methodology. ae 1 INTRODUCTION T HE codesign of embedded real-time signal processing systems is complex and made more difficult when pressed by time-to-market. The use of commercial-off-theshelf (COTS) multiprocessing (MP) hardware and software is usually required by the customer and can reduce the complexity of the codesign by constraining the hardware search space. Complexity can be further reduced by using emerging rapid system prototyping (RSP) frameworks created for COTS MP-based systems. These frameworks provide GUI canvases for hardware and software design as well as configuration and integration and also perform effective code generation that produces deployable code by leveraging vendor communication and computation libraries. While these RSP frameworks assist greatly in implementation, they are inadequate in providing a sound, coherent specification and design methodology (SDM) for two main reasons.

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Section: Rsp Frameworkmentioning

confidence: 99%

Virtual benchmarking and model continuity in prototyping embedded multiprocessor signal processing systems

Janka

Wills

Baumstark

2002

IIEEE Trans. Software Eng.

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show abstract

“…A partial response to this design challenge of real-time multiprocessor digital signal processing systems has been the development of different graphically-based frameworks of tools, such as GEDAE 1 , RIPPEN 2 , PGM ACT 3 , and PeakWare for RACE 4 [1,2] to provide computer-aided system engineering (CASE) support for system implementation. In particular, these frameworks offer code generation that reduces the complexity of system configuration and communication coding, a quality known as "complexity control."…”

Section: Rsp Frameworkmentioning

confidence: 99%

Combining virtual benchmarking with rapid system prototyping for real-time embedded multiprocessor signal processing system codesign

Janka

Wills

Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path From Specification to Protot

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The codesign of embedded real-time signal processing systems is complex. The use of commercial-off-the-shelf (COTS) multiprocessor (MP) hardware and software can reduce codesign complexity. Further complexity reduction can be obtained with emerging rapid system prototyping (RSP) frameworks, which can generate deployable code by leveraging vendor communication and computation libraries. However, these RSP frameworks are inadequate in providing a sound specification and design methodology (SDM) because they require the designer to first choose the implementation target before specification and design exploration. We have developed a new SDM known as MAGIC that allows the designer to capture the specification in an executable model that can then be used in design exploration to find the optimal COTS MP technology and architecture before committing to that technology. The MAGIC SDM exploits emerging open-standards based VSIPL computation middleware and MPI communication middleware to provide connectivity between specification and design with RSP frameworks for implementation. IntroductionThe process of designing large real-time embedded signal processing systems is plagued by a lack of coherent specification and design methodology (SDM). A canonical waterfall design process is commonly used to specify, design, and implement these systems with commercial-off-theshelf (COTS) multiprocessing (MP) hardware and software. Powerful frameworks exist for each individual phase of this canonical design process, but no single methodology exists which enables these frameworks to work together coherently, i.e., allowing the output of a framework used in one phase to be consumed by a different framework used in the next phase.COTS MP Technology. This lack of coherence usually leads to design errors that are not caught until well into the implementation phase. Since the cost of redesign increases as the design moves through these three stages, redesign is the most expensive if not performed until the implementation phase, thus making the current incoherent methodology costly. This paper shows how designs targeting COTS MP technologies can be improved by providing a coherent coupling between these frameworks, a quality known as "model continuity."The codesign of embedded real-time signal processing systems is complex and made more difficult when pressed by time-to-market. The use of COTS MP hardware and software is usually required by the customer and/or necessitated by time-to-market. This can reduce the complexity of the codesign by constraining the hardware search space. Further complexity reduction can be obtained by the use of emerging rapid system prototyping (RSP) frameworks created for COTS MP-based codesign. These frameworks provide GUI canvases for hardware and software design as well as configuration and integration, and also possess effective code generation that produces deployable code by leveraging vendor communication and computation libraries.While these RSP frameworks are great aids for implementation, they are inad...

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A HW/SW codesign framework based on distributed DSP virtual machines

Kreiner

Steger

Teiniker

et al.

Proceedings Euromicro Symposium on Digital Systems Design

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A new development framework based on efficient middleware for real-time embedded heterogeneous multicomputers

Cited by 4 publications

References 13 publications

Virtual benchmarking and model continuity in prototyping embedded multiprocessor signal processing systems

Virtual benchmarking and model continuity in prototyping embedded multiprocessor signal processing systems

Combining virtual benchmarking with rapid system prototyping for real-time embedded multiprocessor signal processing system codesign

A HW/SW codesign framework based on distributed DSP virtual machines

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