A New Dynamic Bandwidth Re-Allocation Technique in Optically Interconnected High-Performance Computing Systems

The emergence of new devices and technologies introduces new trends and design issues for optical transport networks. The higher performance of transmission and switch systems enables the reduction of optoelectronic conversions in intermediate nodes with the introduction of transparency in the network. Simultaneously, the system of Automatic Switched Optical Networks (ASON) describes the rules for the construction of a network enabling cost reduction, above all for maintenance, and fast and automatic reconfiguration. Two axes have to evolve to make possible all these proprieties: the control plane and its relative set of protocols, to manage the network working for the network automation, and also the systems and tools enabling transparency and reconfigurability. In this article we focus on the second axis applied to an automatic transparent network.

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“…[24]. Currently, the best solution is the re-arrangement of already routed demands, as shown in [23][24][25].…”

Section: Non-predictabilitymentioning

confidence: 99%

New transmission systems enabling transparent network perspectives

Morea¹,

Leplingard²,

Zami³

et al. 2008

Comptes Rendus. Physique

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“…In [17,18] we discussed the ability to reconfigure E-RAPID and dynamically reallocate the bandwidth. The significant contributions of this paper are as follows:…”

Section: A Optical Interconnects For High-performance Computing Systemsmentioning

confidence: 99%

Reconfigurable and adaptive photonic networks for high-performance computing systems

Kodi

Louri

2009

Appl. Opt.

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As feature sizes decrease to the submicrometer regime and clock rates increase to the multigigahertz range, the limited bandwidth at higher bit rates and longer communication distances in electrical interconnects will create a major bandwidth imbalance in future high-performance computing (HPC) systems. We explore the application of an optoelectronic interconnect for the design of flexible, high-bandwidth, reconfigurable and adaptive interconnection architectures for chip-to-chip and board-to-board HPC systems. Reconfigurability is realized by interconnecting arrays of optical transmitters, and adaptivity is implemented by a dynamic bandwidth reallocation (DBR) technique that balances the load on each communication channel. We evaluate a DBR technique, the lockstep (LS) protocol, that monitors traffic intensities, reallocates bandwidth, and adapts to changes in communication patterns. We incorporate this DBR technique into a detailed discrete-event network simulator to evaluate the performance for uniform, nonuniform, and permutation communication patterns. Simulation results indicate that, without reconfiguration techniques being applied, optical based system architecture shows better performance than electrical interconnects for uniform and nonuniform patterns; with reconfiguration techniques being applied, the dynamically reconfigurable optoelectronic interconnect provides much better performance for all communication patterns. Based on the performance study, the reconfigured architecture shows 30%-50% increased throughput and 50%-75% reduced network latency compared with HPC electrical networks.

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