1992
DOI: 10.1109/63.145137
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A new multilevel PWM method: a theoretical analysis

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Cited by 926 publications
(163 citation statements)
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“…In the present section, we consider a concrete example in the form of a multilevel pulse-width modulated dc-dc buck converter, [53][54][55][56][57][58] and experimentally confirm that the phenomena observed for the piecewise linear normal form map ͑1͒ actually occur in practical systems. More concretely, we present the first experimental observation of the transition from periodicity to quasiperiodicity through a bordercollision bifurcation.…”
Section: Experimental Confirmationmentioning
confidence: 99%
“…In the present section, we consider a concrete example in the form of a multilevel pulse-width modulated dc-dc buck converter, [53][54][55][56][57][58] and experimentally confirm that the phenomena observed for the piecewise linear normal form map ͑1͒ actually occur in practical systems. More concretely, we present the first experimental observation of the transition from periodicity to quasiperiodicity through a bordercollision bifurcation.…”
Section: Experimental Confirmationmentioning
confidence: 99%
“…when all the positive carriers are in phase with each other and in phase opposition with the negative carriers, the method is known as phase opposition disposition (POD-PWM). Finally, the alternate phase opposition disposition method (APOD-PWM) is obtained by having opposite phase for each two adjacent carriers [28]. In the three-level case, POD-PWM and APOD-PWM are identical, Fig.…”
Section: A Carrier-based Modulationmentioning
confidence: 99%
“…Thus the switching times of the active space vectors can be determined from the sampled sinusoidal reference signal amplitudes in a two-level inverter system [10]. The SPWM scheme, for eleven-level inverter, sinusoidal reference signals are compared with symmetrical level shifted ten triangular carrier signals for PWM generation [11]. (Fig.4), the first crossing (termed as first_cross) of the sinusoidal reference signal cannot always be the minimum magnitude of the three sampled sinusoidal reference signals, in a sampling time interval.…”
Section: Effect Of Common-mode Voltage In Space Vector Locationsmentioning
confidence: 99%
“…The SPWM scheme, when applied to multilevel inverters, uses a number of level-shifted carrier signals to compare with the sinusoidal reference signals [11]. The SVPWM for multilevel inverters [12], [13] involves mapping of the outer sectors to an inner subhexagon sector, to determine the switching time interval, for various space vectors.…”
Section: Introductionmentioning
confidence: 99%