A New Recess Method for SA-STI nand Flash Memory

Wang, Zih-Song; Lee, Ya-Jui; Yang, Rex; Li, Ying-Chia; Chen, Huei-Haurng; Lin, Ying Ting

doi:10.1109/led.2012.2192251

Cited by 8 publications

(3 citation statements)

References 10 publications

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“…The charges tunnel away from the FG due to the high electric field can be approximated by the well known Fowler-Nordheim equation [5][6][7] ) exp(…”

Section: B Erasing Model In a Flash Cellmentioning

confidence: 99%

Charge Programming and Erasing Characteristics of the Submicron Stacked-Gate Flash Cells

Chen

Chung

2013

AMR

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A non-Maxwellian hot-carrier generation current model for simulation of charge injection and erasing in the 0.35um flash EEPROM device is presented in this paper. Unlike the conventional model, which is based on the local electric fields in the device, and it accounts for non-local effects resulting from the large variations in electric field in a submicron flash EEPROM. Good agreements between the measured and calculated results in the charge writing and the Fower-Nordheim erasing operations.

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“…The charges tunnel away from the FG due to the high electric field can be approximated by the well known Fowler-Nordheim equation [5][6][7] ) exp(…”

Section: B Erasing Model In a Flash Cellmentioning

confidence: 99%

Charge Programming and Erasing Characteristics of the Submicron Stacked-Gate Flash Cells

Chen

Chung

2013

AMR

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“…Furthermore, the recess uniformity in the trenches is hard to control in following STI etching back processes. Therefore, the th shifts and the reliability of device degrades [5][6][7][8]. For the breakthrough of the above-mentioned challenge, this paper presents several unique processes to improve the gap-fill capability of ultra-low amount PSZ-SOD solution by optimizing the factors including the film adsorption, fluidity, dispensation rate, and conversion ratio.…”

Section: Introductionmentioning

confidence: 99%

Superior PSZ‐SOD Gap‐Fill Process Integration Using Ultra‐Low Dispensation Amount in STI for 28 nm NAND Flash Memory and Beyond

Lai

Chien

et al. 2015

Journal of Nanomaterials

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The gap-fill performance and process of perhydropolysilazane-based inorganic spin-on dielectric (PSZ-SOD) film in shallow trench isolation (STI) with the ultra-low dispensation amount of PSZ-SOD solution have been investigated in this study. A PSZ-SOD film process includes liner deposition, PSZ-SOD coating, and furnace curing. For liner deposition, hydrophilic property is required to improve the contact angle and gap-fill capability of PSZ-SOD coating. Prior to PSZ-SOD coating, the additional treatment on liner surface is beneficial for the fluidity of PSZ-SOD solution. The superior film thickness uniformity and gap-fill performance of PSZ-SOD film are achieved due to the improved fluidity of PSZ-SOD solution. Following that up, the low dispensation rate of PSZ-SOD solution leads to more PSZ-SOD filling in the trenches. After PSZ-SOD coating, high thermal curing process efficiently promotes PSZ-SOD film conversion into silicon oxide. Adequate conversion from PSZ-SOD into silicon oxide further increases the etching resistance inside the trenches. Integrating the above sequence of optimized factors, void-free gap-fill and well-controlled STI recess uniformity are achieved even when the PSZ-SOD solution dispensation volume is reduced 3 to 6 times compared with conventional condition for the 28 nm node NAND flash and beyond.

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“…7) It has been reported that the erase (ERS) speed is degraded when the SA-STI depth of the device is very large. 8) In this work, the program (PGM) efficiency and endurance characteristics of sub-50 nm NAND flash devices with various SA-STI depths are investigated. A lower PGM efficiency and lower endurance characteristics are observed in the device with a large SA-STI depth than in the device with a small SA-STI depth.…”

Section: Introductionmentioning

confidence: 99%

Characteristics of Sub-50 nm NAND Flash Devices with Various Self-Aligned Shallow Trench Isolation Depths

Yan

Chen

Lee

et al. 2013

Jpn. J. Appl. Phys.

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The program efficiency and endurance characteristics of sub-50 nm NAND flash devices with various self-aligned shallow trench isolation (SA-STI) depths are investigated. Although a large SA-STI depth improves the neighboring floating gate coupling issue and gate coupling ratio, a low program efficiency is also introduced. In addition, lower endurance characteristics are observed in the device with a large SA-STI depth than in the device with a small SA-STI depth. The mechanisms underlying such unfavorable results are discussed on the basis of experimental data and technology computer-aided design simulations.

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A New Recess Method for SA-STI nand Flash Memory

Cited by 8 publications

References 10 publications

Charge Programming and Erasing Characteristics of the Submicron Stacked-Gate Flash Cells

Charge Programming and Erasing Characteristics of the Submicron Stacked-Gate Flash Cells

Superior PSZ‐SOD Gap‐Fill Process Integration Using Ultra‐Low Dispensation Amount in STI for 28 nm NAND Flash Memory and Beyond

Characteristics of Sub-50 nm NAND Flash Devices with Various Self-Aligned Shallow Trench Isolation Depths

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