Proceedings of the 1999 ACM/IEEE Conference on Supercomputing 1999
DOI: 10.1145/331532.331548
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A new switch chip for IBM RS/6000 SP systems

Abstract: This paper describes the architecture of a third-generation switching element which may appear in future IBM RS/6000 SP interconnection networks. In this paper this ASIC will be referred as the Switch3 switch chip. Like its predecessors, Switch3 is an 8-port device implementing output-queuing using the high-utilization central-buffering technique. However, Switch3 offers significant enhancements over these existing SP switch chips by incorporating advances in both VLSI technology and in recent interconnection … Show more

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Cited by 21 publications
(13 citation statements)
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“…The strict conditions enforced by CMP environments impose serious limitations for the direct adoption of some off-chip solutions for multicast support. Mechanisms based on the utilization of large centralized buffers [49] or high radix switches [9] are not suitable under CMP area and power conditions. However, ignoring multicast issues does not make the multidestination message problem disappear.…”
Section: On-chip Multicast Proposalsmentioning
confidence: 99%
“…The strict conditions enforced by CMP environments impose serious limitations for the direct adoption of some off-chip solutions for multicast support. Mechanisms based on the utilization of large centralized buffers [49] or high radix switches [9] are not suitable under CMP area and power conditions. However, ignoring multicast issues does not make the multidestination message problem disappear.…”
Section: On-chip Multicast Proposalsmentioning
confidence: 99%
“…We rely on the Network Time Protocol, NTP (Mills 1995), which is satisfactory in most scenarios, but other solutions are possible. For example, Wu et al (2000) take advantage of the hardware globally synchronized clock of switch adapters (Stunkel et al 1999), while other implementations rely on specific hardware infrastructure (e.g., Blue Gene (Milano et al 2006)). …”
Section: Dalle and Mancinimentioning
confidence: 99%
“…Some of them [16], [17] rely on building virtual circuits, thus being latency sensitive at the circuit establishment. For off-chip multicast routers, please refer to [18], [19] (for multistage networks and/or high-radix switches). These techniques are not suitable for on-chip networks.…”
Section: Related Workmentioning
confidence: 99%