A new technique in LDMOS transistors to improve the breakdown voltage and the lattice temperature

Mehrad, Mahsa; Orouji, Ali A.; Taheri, Motahareh

doi:10.1016/j.mssp.2015.02.057

Cited by 27 publications

(4 citation statements)

References 23 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Moreover, high thermal conductivity of silicon than silicon dioxide in the modified buried layers of the proposed structure reduces maximum temperature in the transistor. [23][24][25] In Fig. 6 maximum temperature of the MB-MOSFET and C-MOSFET is plotted for the different channel length.…”

Section: Resultsmentioning

confidence: 99%

Modifying Buried Layers in Nano-MOSFET for Achieving Reliable Electrical Characteristics

Zareiee

2016

ECS J. Solid State Sci. Technol.

View full text Add to dashboard Cite

In this paper, a new nano-scale SOI MOSFET is proposed to improve the critical electrical characteristics. In the proposed modified buried layers SOI MOSFET (MB-MOSFET), three different layers are considered under the active region. A U-shape P silicon window, N+ buried layer and SiO2 window under the channel region. Applying the materials with higher thermal conductivity than silicon dioxide reduces maximum temperature and controls self heating effects, significantly. Also, a new diode creates between N+ source region and P silicon window that reduces the majority of the holes in the channel and causes controlled floating body effect. Also, the simulation with two dimensional ATLAS simulator shows that the mobility increases which causes higher drain current in the MB-MOSFET as it is compared to the Conventional MOSFET (C-MOSFET).

show abstract

Section: Resultsmentioning

confidence: 99%

Modifying Buried Layers in Nano-MOSFET for Achieving Reliable Electrical Characteristics

Zareiee

2016

ECS J. Solid State Sci. Technol.

View full text Add to dashboard Cite

show abstract

“…Numerous investigations have demonstrated that the maximum electric field in LDMOS power devices is predominantly concentrated at the drain side adjacent to the gate edge. This highlights that this particular point is highly susceptible to high drain voltage [38][39][40][41][42][43] . Therefore, to increase the breakdown voltage, it becomes imperative to mitigate the peak electric field and achieve a more uniform surface electric field.…”

Section: Improvement For the Breakdown Voltagementioning

confidence: 90%

Review of the SiC LDMOS power device

Hu,

Yao,

et al. 2024

J. Semicond.

View full text Add to dashboard Cite

Silicon carbide (SiC), as a third-generation semiconductor material, possesses exceptional material properties that significantly enhance the performance of power devices. The SiC lateral double-diffused metal–oxide–semiconductor (LDMOS) power devices have undergone continuous optimization, resulting in an increase in breakdown voltage (BV) and ultra-low specific on-resistance (R on,sp). This paper has summarized the structural optimizations and experimental progress of SiC LDMOS power devices, including the trench-gate technology, reduced surface field (RESURF) technology, doping technology, junction termination techniques and so on. The paper is aimed at enhancing the understanding of the operational mechanisms and providing guidelines for the further development of SiC LDMOS power devices.

show abstract

“…In these circuits, RF LDMOS are integrated with other electronic components to make system-on-chip for many RF applications such as microwave integrated circuits, power amplifier in handsets, and wireless transmitters [1][2][3]. For these applications, an RF LDMOS should have higher drive current (I D ), lower on-resistance (R on,sp ), higher transconductance (g m ) and higher breakdown voltage (V br ) at a specified cut-off frequency (f t ) and maximum oscillation frequency (f max ).…”

Section: Introductionmentioning

confidence: 99%