A New Way of Controlling Parallel-Connected Inverters by Using Synchronous-Reference-Frame Virtual Impedance Loop—Part I: Control Principle

Abstract

A novel simple and effective autonomous current-sharing controller for parallel three-phase inverters is proposed in this paper. The proposed controller provides faster response and better accuracy in contrast to the conventional droop control, since this novel approach does not require any active or reactive power calculations. Instead, a synchronous-reference-frame (SRF) virtual impedance loop and an SRF-based phase-locked loop are used. Stationary analysis is provided in order to identify the inherent mechanism of the direct and quadrature output currents in relation to the voltage amplitude and frequency with different line impedances by means of the system transfer functions. Comparison experiments from two parallel inverters are presented to compare the control performance of the conventional droop control and the proposed control with different line impedances. In addition, experimental results from a setup with three parallel 2.2 kW inverters verify the effectiveness of the proposed control strategy in different scenarios. Index Terms-Parallel inverters, synchronous reference frame, phase-locked loop, virtual impedance, droop control. I. INTRODUCTION ROOP control method has been widely used in the last decade as the decentralized control of parallel converters in several applications such as parallel redundant uninterruptible power supplies (UPS) to avoid critical communication among units, distributed power systems, microgrids (MGs), and so forth [1]-[12]. This well-known control technique aims to proportionally share active and reactive powers which adjusting frequency and output voltage amplitudes of each inverter locally in order to emulate the behavior of a synchronous generator [3]. Although this technique only requires local information, it presents a number

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“…4 [40]. The controller includes a VR loop (R vird and R virq ), a synchronous-referenceframe phase-locked-loop (SRF-PLL), a DC link voltage feedforward loop, and proportional + resonant (PR) inner voltage and current controllers (G v and G i ).…”

“…The relationship of I od , I oq , R vird , and R virq can be generalized and expressed for a number N of converters as follows [40]:…”

“…where R viri is the VR of DG #i, R vir_base is the preassigned VR, which is equal to 4 Ω according to [40], and ΔR viri is the incremental output from the PID controller.…”

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