A Nine-Level Inverter With Single DC-Link and Low-Voltage Capacitors as Stacked Voltage Sources With Capacitor Voltage Control Irrespective of Load Power Factor

Abstract

This paper proposes a multilevel inverter topology with a single DC-link and series-connected capacitors as stacked voltage sources for multilevel voltage generation. The voltage deviation of a DC-link capacitor will occur whenever a phase terminal connects to the balanced neutral points (NPs: terminal joints of DC-link capacitors). On the contrary, if the voltage of a DC-link capacitor deviates from the nominal voltage, the same phase currents can be utilised to balance these neutral points. This new technique is being proposed for the first time in literature. Any voltage disturbance of the DC-link capacitors is balanced using the motor phase currents, irrespective of load power factor and modulation indices. For the balanced neutral points, whenever a phase connects to a neutral point, the other phase terminal tapping positions are varied on the DC-link to establish i A + i B + i C = 0 for that neutral point. The pole voltage level variation at motor phase terminals is undisturbed by adding extra cascaded H-bridges (CHBs) at each phase leg. The voltages of CHB capacitors are controlled conventionally by inverter pole voltage redundancies. The detailed experimental results for open-loop V/f and closed-loop field-oriented control on an induction motor are presented using a nine-level laboratory prototype.

On the Minimum Value of Split DC Link Capacitances in Three-Phase Three-Level Grid-Connected Converters Operating with Unity Power Factor with Limited Zero-Sequence Injection

“…It is well-evident that upper and lower bound constraints on DC link voltage yield a single optimal solution. 14) and ( 23) to obtain (24).…”

“…During the experiments, a 4-channel oscilloscope was employed, hence the total DC link voltage in Figure 8 was estimated by partial DC link voltage summation using an oscilloscope Math function. 14) and ( 23) to obtain (24).…”

“…Split DC link capacitances valued according to (25) were assumed to possess ESR of 0. 14) and ( 23) to obtain (24).…”

“…[21] conducted minimum DC link capacitance sizing based on stability requirements for photovoltaic inverters. Recently, three-level three-phase AC/DC and DC/AC converters with split two-capacitors DC links have emerged as a viable topology for power ratings ranging from 10 kVA to 100 kVA [22] (it should be emphasized that inverters producing more than three-levels of voltage containing multiple-split-capacitors DC links [23,24] are not addressed in this work). However, systems that use split DC links introduce an interesting phenomenon as follows: despite the absence of a pulsating power component at the DC side, split DC link capacitors in such systems are still subject to oscillating power components even though they sum up to zero.…”

Inherently Decoupled Dc-Link Capacitor Voltage Control of Multilevel Neutral-Point-Clamped Converters

“…In fact, any alternative choice of the variables to be regulated in the control loops (individual capacitor voltages, neutral-point voltages, etc. [6]- [8]) leads to a coupled control system, where a decoupling would need to be applied for best performance. Thus, the control configuration in Fig.…”