A Nonlinear, Low-Power, VCO-Based ADC for Neural Recording Applications

Shokri, Reza; Koolivand, Yarallah; Shoaei, Omid; Aiello, Orazio; Caviglia, Daniele

doi:10.1109/iicm60532.2023.10443199

2023 5th Iranian International Conference on Microelectronics (IICM) 2023

DOI: 10.1109/iicm60532.2023.10443199

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A Nonlinear, Low-Power, VCO-Based ADC for Neural Recording Applications

Reza Shokri,

Yarallah Koolivand,

Omid Shoaei

et al.

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2024

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A Reconfigurable, Nonlinear, Low-Power, VCO-Based ADC for Neural Recording Applications

Shokri,

Koolivand,

Shoaei

et al. 2024

Sensors

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Neural recording systems play a crucial role in comprehending the intricacies of the brain and advancing treatments for neurological disorders. Within these systems, the analog-to-digital converter (ADC) serves as a fundamental component, converting the electrical signals from the brain into digital data that can be further processed and analyzed by computing units. This research introduces a novel nonlinear ADC designed specifically for spike sorting in biomedical applications. Employing MOSFET varactors and voltage-controlled oscillators (VCOs), this ADC exploits the nonlinear capacitance properties of MOSFET varactors, achieving a parabolic quantization function that digitizes the noise with low resolution and the spikes with high resolution, effectively suppressing the background noise present in biomedical signals. This research aims to develop a reconfigurable, nonlinear voltage-controlled oscillator (VCO)-based ADC, specifically designed for implantable neural recording systems used in neuroprosthetics and brain–machine interfaces. The proposed design enhances the signal-to-noise ratio and reduces power consumption, making it more efficient for real-time neural data processing. By improving the performance and energy efficiency of these devices, the research contributes to the development of more reliable medical technologies for monitoring and treating neurological disorders. The quantization step of the ADC spans from 44.8 mV in the low-amplitude range to 1.4 mV in the high-amplitude range. The circuit was designed and simulated utilizing a 180 nm CMOS process; however, no physical prototype has been fabricated at this stage. Post-layout simulations confirm the expected performance. Occupying a silicon area is 0.09 mm2. Operating at a sampling frequency of 16 kS/s and a supply voltage of 1 volt, this ADC consumes 62.4 µW.

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A Reconfigurable, Nonlinear, Low-Power, VCO-Based ADC for Neural Recording Applications

Shokri,

Koolivand,

Shoaei

et al. 2024

Sensors

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show abstract

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A Nonlinear, Low-Power, VCO-Based ADC for Neural Recording Applications

Cited by 1 publication

References 19 publications

A Reconfigurable, Nonlinear, Low-Power, VCO-Based ADC for Neural Recording Applications

A Reconfigurable, Nonlinear, Low-Power, VCO-Based ADC for Neural Recording Applications

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