A nonvolatile ferroelectric memory device with a floating gate

Abstract

An adaptive ferroelectric field-effect transistor (FET) with a floating gate has been developed using a thin film of lead titanate ( PbTiO3) deposited on a n/p+ substrate by rf sputtering. This device utilizes the charge storage on the floating gate to control the n layer conductivity of a n/p+ Si substrate and performs a memory function, in which the drain conductance changes in proportion to the charge storage density on the floating gate. The device is a bulk channel field transistor structure and different from the conventional surface channel-type floating gate memory device. Thus, it possesses higher mobility and fast access time (<160 ns). The FET has low write/erase voltages (≤10 V) and its write/erase cycles are more than 106.

Application of Perovskite‐Structured Materials in Field‐Effect Transistors

“…One-transistor-type ferroelectric random-access memory (FeRAM) device has attracted considerable attention because it can further improve the RAM integration level compared with the conventional onetransistor/one-capacitor FeRAM. [44] In a FeFET memory, the remanent polarization states of the ferroelectric gate can control the electric resistance of the channel under the ferroelectrics [44][45][46][47][48][49][50][51][52][53][54] because the electric polarization in the ferroelectric layer causes carrier depletion and accumulation in the conductive layer. [44] In a FeFET memory, the remanent polarization states of the ferroelectric gate can control the electric resistance of the channel under the ferroelectrics [44][45][46][47][48][49][50][51][52][53][54] because the electric polarization in the ferroelectric layer causes carrier depletion and accumulation in the conductive layer.…”

“…[44] In a FeFET memory, the remanent polarization states of the ferroelectric gate can control the electric resistance of the channel under the ferroelectrics [44][45][46][47][48][49][50][51][52][53][54] because the electric polarization in the ferroelectric layer causes carrier depletion and accumulation in the conductive layer. [44][45][46][47][48][49][50][51][52][53][54] When a ferroelectric oxide film is incorporated in oxide heterostructures, 2D electron gases (2DEGs) are confined at the oxide-oxide heterointerfaces, and the inplane conduction of 2DEG can be switched by the polarization reversal of the ferroelectric film. [55] Additionally, this binary resistance state can be read out without alternative reversals of the ferroelectric polarization state and used as nonvolatile and nondestructive memory.…”

“…FeFETs permit a nondestructive memory readout because it can be interrogated by reading the conductance of the semiconductor channel . In a FeFET memory, the remanent polarization states of the ferroelectric gate can control the electric resistance of the channel under the ferroelectrics because the electric polarization in the ferroelectric layer causes carrier depletion and accumulation in the conductive layer. These states are expected to be retained due to the remanent polarization of the ferroelectric layer .…”

Ferroelectric Gate on AlGaN/GaN Heterostructures

“…These samples exhibited poor switching behavior, poor current-voltage curves, large leakage currents and large dif-fusive interfaces. Some successful attempts at implementing ferroelectric gates on silicon have been achieved by Sugibuchi et al [1975], Chen et al [1996] and Kijima et al [2001], but are far from ideal and need much more optimisation. Sugibuchi et al [1975] 2 .…”

“…In order to stably modulate the channel resistance of a semiconductor it was claimed to be a necesssity to use a ferroelectric with a coercive field greater than the depolarisation field. The concept of ferroelectric gate was once more implemented in field effect transistors in the nineteen nineties by Chen et al [1996]. Where PbTiO 3 was used as the ferroelectric floating gate on a n/p + doped Si transistor, to control the conductivity in the n-doped layer.…”