A novel, accurate load-pull setup allowing the characterization of highly mismatched power transistors

Bouysse, Philippe; Nébus, Jean-Michel; Coupat, J.M.; Villotte, J.P.

doi:10.1109/22.275264

Cited by 33 publications

(7 citation statements)

References 6 publications

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“…The ⌫ L coefficient is then synthesized on a circle whose center is ⌫ 0 and radius is R . The synthesis of the load reflection coefficient can be then focused in a specific zone around ⌫ 0 resulting in lower output power of the loop amplifier [7]. But, as shown with [2], ⌫ 0 magnitude is significantly reduced by the L 2 factor so that the output power of the loop amplifier must increase to synthesize ⌫ L with magnitude lower but close to 1.…”

Section: Conventional and New Configuration Of The Active Loop With Pmentioning

confidence: 98%

A new configuration to improve the active loop technique for transistor large signal characterization in the Ka band

Yattoun

Peden

2007

Micro & Optical Tech Letters

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Section: Conventional and New Configuration Of The Active Loop With Pmentioning

confidence: 98%

A new configuration to improve the active loop technique for transistor large signal characterization in the Ka band

Yattoun

Peden

2007

Micro & Optical Tech Letters

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“…If the electrical length of the distributed elements, gain, and ripple parameters are properly chosen, we can synthesize the distributed networks for matching the input and output device models using Eqs. (3)- (6).…”

Section: Impedance-matching Networkmentioning

confidence: 98%

Power-amplifier design using negative-image device models

Kim¹,

Ramahi²

2005

Microw. Opt. Technol. Lett.

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points on the PSTD grids over whole domain will be needed for PSTD updating, including those in the FEM region (updated from the FEM results) and inside scatter (where the E-field vanishes). NUMERICAL EXPERIMENTS AND DISCUSSIONSFor purposes of demonstration, a 6-cm-diameter metallic-cylinder scatterer embedded in a free-space medium is adopted. The Gaussian excitation has a carrier frequency of 5 GHz, t o ϭ 480 ps and ϭ 160 ps. For fruitful comparison, the grid resolution for FDTD is selected as dx ϭ 3 mm, whereas the PSTD is taken as 5 dx. The time step is chosen as 1 ps for the central-difference algorithm as well as for Newmark method for easy comparison. With dx selected, the FEM will result in 691 elements. The computational domain is truncated using the 8-layer UPML, with each layer being dx thick. Figure 3 shows a comparison of the FEM-FDTD, PSTD, and MIE series, and the TDFEM-PSTD algorithm, whereas Table 1 depicts a comparison of the computational time taken for all these methods. From the figure, we notice that PSTD suffers severely from its inability to model curvilinear boundary. In comparison with FEM-FDTD, similar accuracy is obtained by our proposed algorithm. From the table, our proposed algorithm outperforms the FEM-FDTD method in terms of the CPU time taken. As compared to FEM-FDTD, fewer cells are needed for our algorithm. Figure 4 shows the results of two different source-introducing methods. One approach is to apply the Dirichlet boundary condition on the FEM boundary as a source, the other one is to use the boundary integral in Eq. (3). As we can see, the former will result in a late-time effect, and the latter one has better stability. CONCLUSIONIn conclusion, an efficient and stable hybrid TDFEM-PSTD method has been proposed. The proposed TDFEM-PSTD was found to be more robust and efficient than FEM-FDTD and PSTD. The proposed algorithm consumes a lower number of cells than the FEM-FDTD method and is more accurate than the PSTD method. Increasing demand and market trends for high-power amplifiers require designers to obtain optimum performance from power devices, and predict obtainable circuit performance in the beginning stage of a circuit design. A traditional key requirement for power amplifiers is to extract maximum output power with high efficiency from power devices. With the development of multicarrier communication systems, nonlinear characteristics of power amplifiers are becoming more critical parameters in the evaluation of power amplifiers. Since the power amplifier is one of the most critical components with regard to system performance and cost, engineers are increasingly challenged to extract optimal performance from cost-competitive devices [1]. Several techniques have been developed in the past to aid in building wireless power amplifiers with required performance. In [2,3], a load-line method for power transistors has been introduced to determine optimum load resistance for maximum output power. When used with small-signal-device equivalent circuits, the method is gener...

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“…The most important step in a power amplifier design is the determination of the optimum power state of the FET and the corresponding input/ output admittances (Y,", Yo,,), which maximize the device output power P,,, at 1-dB compression. The equivalent circuit of the FET in this optimum state may be determined either with the aid of a nonlinear model or by load-pull measurements [11].…”

Section: Optimum Power Loadmentioning

confidence: 99%

“…(7) and (91, the required equivalent conductance Gt, which must be presented to the port 2 ( Fig. 4): (11) The impedance transformation is achieved by a quarter-wave transmission line of characteristic admittance:…”

Section: Moderate Bandwidth Distributed Amplijiersmentioning

confidence: 99%

Large signal design method of distributed power amplifiers applied to a 2–18-GHz GaAs chip exhibiting high power density performances

Campovecchio¹,

Bras²,

Hilal³

et al. 1996

Int. J. Microw. Mill.-Wave Comput.-Aided Eng.

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A suitable large signal design method of distributed power amplifiers, based on the optimum FET load requirement for high power operation, is proposed in this article. The gate and drain line characteristic admittances are determined, providing both the initial values and right directions for an optimum design. To validate the proposed design method, a FET amplifier demonstrator with a gate periphery of 1.2 mm has been manufactured at the Texas Instruments foundry. The MMIC distributed amplifier demonstrated an improved power density performance of 340 mW/mm over the 2–18‐GHz frequency band associated with a minimum of 13% power‐added efficiency and 24% drain efficiency at 1‐dB compression in CW operation. © 1996 John Wiley & Sons, Inc.

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A novel, accurate load-pull setup allowing the characterization of highly mismatched power transistors

Cited by 33 publications

References 6 publications

A new configuration to improve the active loop technique for transistor large signal characterization in the Ka band

A new configuration to improve the active loop technique for transistor large signal characterization in the Ka band

Power-amplifier design using negative-image device models

Large signal design method of distributed power amplifiers applied to a 2–18-GHz GaAs chip exhibiting high power density performances

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