The double gate junctionless transistor (DG-JLT) has become the most promising device in sub nanometer regime. DGJLT based circuits have improved performance and simpler fabrication than their inversion mode counterparts. This paper demonstrates the design of different analog and digital circuits using DGJLT. Ampli ers and inverters are the basic building block of electronic ICs. A MOS ampli er converts the variation of the gate to source voltage to a small current under transconductance and hence, the output voltage. A single-stage ampli er and differential ampli er have been designed with junctionless-double-gate (JL-DG) MOSFET. Trans-conductance, output voltage, and gain have been investigated using ATLAS 2D device simulator. The inverter is the primary logic gate that can be used to verify the device's response in digital applications. Further, CMOS inverter have been designed using JL-DG MOSFET, and its performance parameters such as switching voltage, noise margin, and logic delay have been analyzed. A switching voltage of 0.43 V, noise margin of 0.265 V, and a delay of 19.18 psec have been obtained for the basic cell. CMOS inverter using JL-DG MOSFET at 20 nm technology node have prompted better performance results. Thus, The JL-DG MOSFET has a bright future in low-power analog and digital applications.