A Novel Architecture of Delta-Sigma Modulator Enabling All-Digital Multiband Multistandard RF Transmitters Design

Helaoui, Mohamed; Hatami, Safar; Negra, Renato; Ghannouchi, Fadhel M.

doi:10.1109/tcsii.2008.2003345

Cited by 102 publications

(38 citation statements)

References 13 publications

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“…This paper follows and extends the initial concept of all-digital transmitter presented in [10]; however, the work being presented herein reports the full development of an integrated demonstrator. It includes the novel design and implementation of a suitable time-interleaved parallel delta-sigma modulator that enables a significant broadening of the modulator signal bandwidth to handle current and emerging communication signals, while keeping a relatively good signal-to-noiseand-distortion ratio (SNDR) of about 60 dB.…”

Section: Introductionmentioning

confidence: 91%

“…In this approach, a single 4 × 1 multiplexer is used to up-convert the digital baseband signal to RF frequency [10,15,16]. The inputs of the multiplexer must be derived by x l , x Q , −x l and −x Q , where x l and x Q represent the in-phase and quadrature-phase of the delta-sigma modulator's outputs.…”

Section: High-speed Multiplexer As Frequency Up-convertermentioning

confidence: 99%

“…In advanced transmitting methods using different techniques, such as Envelope Elimination and Restoration (EER) or Polar transmitters [2][3][4][5], delta-sigma based transmitters [6][7][8][9][10] and Linear amplification with Nonlinear Components (LINC) [11,12], the envelope-varying signal is converted to a signal with a constant envelope. Consequently, it is possible to use highly efficient saturated linear amplifiers or switching-mode power amplifiers (SMPAs) such as classes D, E or F [13].…”

Section: Introductionmentioning

confidence: 99%

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Time-Interleaved Delta-Sigma Modulator for Wideband Digital GHZ Transmitters Design and SDR Applications

Ebrahimi¹,

Helaoui²,

Ghannouchi³

2011

PIER B

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Abstract-This paper presents a development of a wideband deltasigma modulator for fully digital GHz transmitters. The fully digital RF transmitter is developed as a promising solution for software defined radio (SDR) terminals and applications. The fully digital transmitter consists of a delta-sigma modulator, a highspeed multiplexer and a switching-mode power amplifier. The speed limitation of delta-sigma modulator is the main limitation to increase the signal bandwidth in fully digital transmitters. In this paper, the bandwidth of the fully digital transmitter is increased 8 times using parallel processing time-interleaved architecture, while maintaining the same signal quality. This architecture was implemented on FPGA and tested for different standards (WiMAX and LTE) with a signal bandwidth up to 8 MHz. The concept was assessed in terms of SNDR by using a differential logic analyzer at the output of FPGA, and the SNDR was found to be around 60 dB.

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Section: Introductionmentioning

confidence: 91%

Section: High-speed Multiplexer As Frequency Up-convertermentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Time-Interleaved Delta-Sigma Modulator for Wideband Digital GHZ Transmitters Design and SDR Applications

Ebrahimi¹,

Helaoui²,

Ghannouchi³

2011

PIER B

Self Cite

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“…(3) for the same reason as for (1). Secondly, it is necessary for f i and f c to satisfy (4). The reason is shown in Figs.…”

Section: Relationship Between Fi and Fcmentioning

confidence: 99%

“…To meet these requirements, the envelope pulse-width modulation (EPWM) technique [1]- [12] has been intensively investigated owing to its potential high power efficiency and linearity. Among the EPWM transmitter architectures the quadraturemodulation-type (QM) EPWM transmitter [2], [4]- [6], [8]- [12] is promising. First, QM EPWM enables a lower sampling rate for pulse-width modulators such as  modulators (DSMs).…”

Section: Introductionmentioning

confidence: 99%

Optimization of DSM Sampling Frequency and Interleaving Frequency for Bilevel Quadrature-Modulation EPWM Transmitter

Noda

Umeda

Kozawa

2016

Journal of Signal Processing

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We previously proposed a bilevel quadrature-modulation (QM) envelope-pulse-width-modulation (EPWM) transmitter using half a side of a trilevel EPWM architecture. However, the optimum relationship between the  modulation (DSM) sampling frequency (f s ), the interleaving frequency (f i ) and the carrier frequency (f c ) for a bilevel QM EPWM transmitter has not been investigated. This paper presents this optimum relationship, with the error vector magnitude (EVM) and the coding efficiency (CE) as figures of merit (FOMs).

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Introduction to RF Power Amplifier Design and Architecture

Rawat

Roblin

Koul

2020

Analog Circuits and Signal Processing

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A Novel Architecture of Delta-Sigma Modulator Enabling All-Digital Multiband Multistandard RF Transmitters Design

Cited by 102 publications

References 13 publications

Time-Interleaved Delta-Sigma Modulator for Wideband Digital GHZ Transmitters Design and SDR Applications

Time-Interleaved Delta-Sigma Modulator for Wideband Digital GHZ Transmitters Design and SDR Applications

Optimization of DSM Sampling Frequency and Interleaving Frequency for Bilevel Quadrature-Modulation EPWM Transmitter

Introduction to RF Power Amplifier Design and Architecture

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