A Novel Characterization Technique to Extract High Voltage - High Current IV Characteristics of Power MOSFETs from Dynamic Measurements

Salcines, Cristino; Kruglov, A. I.; Kallfass, Ingmar

doi:10.1109/wipda.2018.8569160

Cited by 9 publications

(6 citation statements)

References 9 publications

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“…Small-signal measurements are typically performed on standard impedance analyzers selecting a low DC bias sweep rate to accurately extract C-V characteristics. Moreover, to perform C-V measurements during the MOSFET's on state as function of both V ds and V gs , external bias tees have to be added to the MOSFET's terminals [31], [32]. There, a trade-off between the small-signal measurement frequency and self-heating effects have to be considered [5].…”

Section: Small-signal Gate Characterization Methodologymentioning

confidence: 99%

Gate Capacitance Characterization of Silicon Carbide and Silicon Power mosfets Revisited

Stark

Tsibizov

Kovacevic-Badstuebner

et al. 2022

IEEE Trans. Power Electron.

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Capacitance-voltage (C-V) gate characteristics of power MOSFETs play an important role in the dynamic device performance. C-V characterization of the MOSFET gate structure is a necessary step for evaluating the MOSFET switching behavior and calibrating lumped equivalent capacitances of MOSFET compact models. This paper presents a comprehensive analysis on gate C-V measurements of silicon (Si) and silicon carbide (SiC) power MOSFETs leading to clear measurement guidelines. The requirements on the measurement setup, the selection of equivalent models used for the MOSFET capacitance extraction, and the measurement frequency range are defined and supported by an accurate C-V characterization of several Siand SiC power MOSFETs. The results show that the gate-source and gate-drain capacitances should be extracted at a frequency of some ten kHz rather than at 1 MHz, as typically adopted in datasheets, in order to avoid parasitic effects introduced by the measurement setup and package. Furthermore, analytical expressions for C dg and Csg were derived based on a lumped equivalent circuit, which explain the influence of the measurement setup and the package parasitics on the C-V measurements. Non-ideal measurement conditions are identified and correlated to the differences in C-V extraction with either parallel or series equivalent model. A new method is proposed to estimate the ratio of the MOSFET's on-state resistance components R ch and R drift based on the presented C-V measurement guidelines, which is applicable to all three-and four-terminal power MOSFETs.

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Section: Small-signal Gate Characterization Methodologymentioning

confidence: 99%

Gate Capacitance Characterization of Silicon Carbide and Silicon Power mosfets Revisited

Stark

Tsibizov

Kovacevic-Badstuebner

et al. 2022

IEEE Trans. Power Electron.

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show abstract

“…The first group refers to CNTFET and the second group refers to MOSFET. The pre-test analysis was done using clinicalc.com by keeping g-power at 80%, threshold 1551 at 0.05%, confidence interval at 95% (Shaukat, Umer, and Islam 2017), (Salcines, Kruglov, and Kallfass 2018). Each group consists of 320 samples.…”

Section: Methodsmentioning

confidence: 99%

Simulation of Carbon Nanotube based Field Effect Transistor by Varying Gate Oxide Thickness to Explore its Electrical Property and Compare it with Standard Mosfet

Reddy¹,

Deepak²

2021

revistageintec

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Aim: The current and voltage characteristics of CNTFET and MOSFET are simulated by varying their gate oxide thickness ranging from 3.5nm to 11.5nm. Materials and Methods: The electrical conductance of CNTFET (n = 320) was compared with MOSFET (n = 320) by varying gate oxide thickness ranging from 3.5nm to 11.5nm in the NanoHUB© tool simulation environment. Results: CNTFET has significantly higher conductance (12.52 mho) than MOSFET (12.07 mho). The optimal thickness for maximum conductivity was 4nm for CNTFET and 3.5 nm for MOSFET. Conclusion: Within the limits of this study, CNTFET with the gate oxide thickness of 4 nm offers the best conductivity.

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“…This leads to inaccurate modeling of the transconductance of the power switch at large drain-source voltages and hence non-precise dynamic behavior reproduction. A double pulse test (DPT) permits the study of a power switch at switching conditions close to the application [12]. The power MOSFET in a DPT experiences for short time simultaneous high current and high voltage operation conditions.…”

Section: Characterization Of Sic Mosfetmentioning

confidence: 99%

A Compact Model for SiC Power MOSFETs for Large Current and High Voltage Operation

Salcines¹,

Khandelwal²,

Kallfass³

2021

Preprint

Self Cite

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This work presents a physics based compact model for SiC power MOSFETs that accurately describes the I-V characteristics up to large voltages and currents. Charge-based formulations accounting for the different physics of SiC power MOSFETs are presented. The formulations account for the effect of the large SiC/SiO2 interface traps density characteristic of SiC MOSFETs and its dependence with temperature. The modeling of interface charge density is found to be necessary to describe the electrostatics of SiC power MOSFETs when operating at simultaneous high current and high voltage regions. The proposed compact model accurately fits the measurement data extracted of a 160 milli ohms, 1200V SiC power MOSFET in the complete IV plane from drain-voltage V d = 5mV up to 800 V and current ranges from few mA to 30 A.

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A Novel Characterization Technique to Extract High Voltage - High Current IV Characteristics of Power MOSFETs from Dynamic Measurements

Cited by 9 publications

References 9 publications

Gate Capacitance Characterization of Silicon Carbide and Silicon Power mosfets Revisited

Gate Capacitance Characterization of Silicon Carbide and Silicon Power mosfets Revisited

Simulation of Carbon Nanotube based Field Effect Transistor by Varying Gate Oxide Thickness to Explore its Electrical Property and Compare it with Standard Mosfet

A Compact Model for SiC Power MOSFETs for Large Current and High Voltage Operation

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