A Novel Concurrent 22–29/57–64-GHz Dual-Band CMOS Step Attenuator With Low Phase Variations

Bae, Jungyun; Nguyen, Cam

doi:10.1109/tmtt.2016.2546256

Cited by 28 publications

(10 citation statements)

References 10 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Besides the selection of HBTs, which is necessitated by poor switching capability of FETs, additional design methodologies had to be explored to reduce the parasitic elements because the lossy silicon-based substrate induces relatively more parasitic effects and they are particularly troublesome for the deployed attenuator topology [6]. It is reported in [10] that if the shunt connected HBTs are in RS mode, IL improves because electrons have a higher potential barrier during their leakage to ground due to higher doping concentration in the emitter than the collector.…”

Section: Reverse-saturation Methodsmentioning

confidence: 99%

“…The Πand T-type attenuation units are substantially dependent on the parasitic elements induced by the switching devices concerning their relative attenuation range, flatness, bandwidth, phase variation, IL and P1dB [6]. Principally, R on x C of f product, preferred to be as low as possible, is an accustomed metric to evaluate switching performance of the transistors.…”

Section: B Comparison Of Fet and Hbt Switches As A Series Switchmentioning

confidence: 99%

“…Amplitude control blocks such as voltage controlled attenuators and variable gain amplifiers (VGAs) have been widely employed in T/R modules to provide high directivity, low sidelobe levels, high precision beam tailoring/steering ability, better null points, and accurate beam scanning/tracking response [5], [6]. Attenuators are preferable to VGAs in terms of their higher linearity, wider bandwidth, lesser temperature dependency, lower control complexity and easy compensation of phase imbalance [6]. There are two types of mostly used attenuator topologies: continuous/analog and digital/step [7].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A 7-Bit Reverse-Saturated SiGe HBT Discrete Gain Step Attenuator

Davulcu

Burak

Gürbüz

2020

IEEE Trans. Circuits Syst. II

View full text Add to dashboard Cite

In this study, the analysis, design and measured results of a fully integrated 7-Bit step attenuator implemented in a 0.25-µm Silicon-Germanium (SiGe) BiCMOS process technology, are described. The attenuator is designed based on delicately ordered and cascaded Π/T type attenuation blocks, which are comprised of series/shunt switches employing SiGe hetero-junction bipolar transistors (HBTs) with peak fT /fmax of 110/180 GHz. HBTs are employed as a series switch to decrease the insertion-loss of the attenuator. Moreover, to authors' best knowledge, this is the first study presenting the effect of employing reverse-saturated HBTs as a shunt switch for each attenuation blocks. Thanks to this advancement, the highest input-referred 1-dB compression point (IP 1dB ) is reported for Si-based similar studies. This method also decreases the insertion-loss of the proposed attenuator. The measurements result in the state-ofthe-art performance with 28.575 dB attenuation range by 0.225 dB gain steps while maintaining 7-bit amplitude resolution across 6.6 GHz to 12.8 GHz frequency band, where RMS phase error remains below 3.3 • and insertion loss (IL) is less than 12.4 dB. The measured IP 1dB of the attenuator is 13.5 dBm while drawing 8 mA from 3.3 V supply. The die occupies an area of 1.37 mm x 0.56 mm excluding pads.

show abstract

Section: Reverse-saturation Methodsmentioning

confidence: 99%

Section: B Comparison Of Fet and Hbt Switches As A Series Switchmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A 7-Bit Reverse-Saturated SiGe HBT Discrete Gain Step Attenuator

Davulcu

Burak

Gürbüz

2020

IEEE Trans. Circuits Syst. II

View full text Add to dashboard Cite

show abstract

“…A variety of passive attenuator circuits have been designed in [6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24]. There are three most-used topologies in the passive attenuators: Switched path attenuators [6][7][8][9], distributed attenuators [10,11] and switched T/Pi attenuators [12][13][14][15][16][17][18][19][20][21][22][23][24]. Switched path attenuators topology use single-pole-double-throw (SPDT) switches to control the signal between reference thru line path and the resistive attenuation network path.…”

Section: Introductionmentioning

confidence: 99%

A 6-Bit Ku Band Digital Step Attenuator with Low Phase Variation in 0.13-μm SiGe BiCMOS

Luo

Yao

et al. 2019

Electronics

View full text Add to dashboard Cite

A 6-bit Ku band digital step attenuator with low phase variation is presented in this paper. The attenuator is designed with 0.13-μm SiGe BiCMOS process technology using triple well isolation N-Metal-Oxide-Semiconductor (TWNMOS) and through-silicon-via (TSV). TWNMOS is mainly used to improve the performance of switches and reduce the insertion loss (IL). TSV is utilized to provide approximately ideal global current ground plane with low impedance for the attenuator. In addition, substrate floating technique and new capacitance compensation technique are adopted in the attenuator to improve the linearity and decrease the phase variation. The measured results show that the attenuator IL is 6.99–9.33 dB; the maximum relative attenuation is 31.87–30.31 dB with 0.5-dB step (64 states), the root mean square (RMS) for the amplitude error is 0.58–0.36 dB and the phase error RMS is 2.06–3.46° in the 12–17 GHz frequency range. The total chip area is 1 × 0.9 mm2.

show abstract

“…Attenuators due to their zero DC power consumption and superior linearity are preferable to VGAs particularly in wideband applications [1,2,3,4,5]. Conventional T-/Pi-type, bridge T-/Pi-type and distributed are the basic topologies for most attenuators and can provide step attenuation by digitally controlling the gate voltages [4,5,6,7,8,9,10].…”

Section: Introductionmentioning

confidence: 99%

A CMOS digital step X-type attenuator with low process variations

Wan

Chen

Wang

2017

IEICE Electron. Express

View full text Add to dashboard Cite

In this paper, a digital step X-type attenuator with low process variations is demonstrated using 90 nm CMOS technology. The X-type attenuator uses MOSFETs as voltage controlled resistors, which influenced by process parameters. And a compensation circuit associated with the threshold voltage is employed to mitigate the process influence. The attenuator have a maximum attenuation range of 32 dB with 0.5 dB steps. The rms amplitude error and rms phase error are 0.42 dB and 3.1°over 23.5-30 GHz respectively, and the insertion losse is 9.77 dB at 25 GHz. The core chip size is 0.48 mm 2 .

show abstract

A Novel Concurrent 22–29/57–64-GHz Dual-Band CMOS Step Attenuator With Low Phase Variations

Cited by 28 publications

References 10 publications

A 7-Bit Reverse-Saturated SiGe HBT Discrete Gain Step Attenuator

A 7-Bit Reverse-Saturated SiGe HBT Discrete Gain Step Attenuator

A 6-Bit Ku Band Digital Step Attenuator with Low Phase Variation in 0.13-μm SiGe BiCMOS

A CMOS digital step X-type attenuator with low process variations

Contact Info

Product

Resources

About