A novel constant-g_m rail-to-rail input stage for operational amplifiers

Abstract

A novel constant-gm rail-to-rail input stage for CMOS operational amplifier is presented in this paper. The input stage mainly consists of a PMOS transistors differential pair and a NMOS transistors differential pair placed in parallel as a rail-to-rail differential input stage and the tail currents of the two differential pairs are controlled by a PMOS and a NMOS common-mode voltage sensor respectively. The gm of the input stage of the operational amplifier could be a constant value within the input common-mode voltage. The simulation result shows that when the power supply voltage is 1.8V and 3.3V respectively, the gm variation in the entire input range (0~1.8V or 0~3.3V) is within ± 1.38% and ± 3.38%. The power dissipation is 36.9μW and 51.74μW. SMIC 55nm CMOS process and Cadence SPECTRE simulator are used to layout and simulate this work.