2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA) 2015
DOI: 10.1109/vlsi-sata.2015.7050474
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A novel delay &amp; Quantum Cost efficient reversible realization of 2<sup>i</sup> &#x00D7; j Random Access Memory

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Cited by 6 publications
(1 citation statement)
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“…The most existing reversible decoders (Majumder et al, 2015c;Mamun et al, 2013;Misra et al, 2014;Shamsujjoha and Babu, 2013;Sharma et al, 2014;Sharmin et al, 2011) do not use efficient circuits. The proposed decoder block, called GH-DEC, uses the NOT, AND, OR operations to decrease the number of constant inputs, number of garbage outputs, quantum cost, and circuit complexity.…”
Section: The Proposed Reversible Circuit Of 5-to-32 Decoder Blockmentioning
confidence: 99%
“…The most existing reversible decoders (Majumder et al, 2015c;Mamun et al, 2013;Misra et al, 2014;Shamsujjoha and Babu, 2013;Sharma et al, 2014;Sharmin et al, 2011) do not use efficient circuits. The proposed decoder block, called GH-DEC, uses the NOT, AND, OR operations to decrease the number of constant inputs, number of garbage outputs, quantum cost, and circuit complexity.…”
Section: The Proposed Reversible Circuit Of 5-to-32 Decoder Blockmentioning
confidence: 99%